clk: rockchip: rk3128: Add HCLK_SFC
The SFC IP exists only in RK3128 version of the SoC, thus the clock gets added to rk3128_clk_branches. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20240606143401.32454-6-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -553,6 +553,7 @@ static struct rockchip_clk_branch rk3128_clk_branches[] __initdata = {
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RK2928_CLKSEL_CON(11), 14, 2, MFLAGS, 8, 5, DFLAGS,
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RK2928_CLKGATE_CON(3), 15, GFLAGS),
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GATE(HCLK_SFC, "hclk_sfc", "hclk_peri", 0, RK2928_CLKGATE_CON(7), 1, GFLAGS),
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GATE(HCLK_GPS, "hclk_gps", "aclk_peri", 0, RK2928_CLKGATE_CON(3), 14, GFLAGS),
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GATE(PCLK_HDMI, "pclk_hdmi", "pclk_cpu", 0, RK2928_CLKGATE_CON(3), 8, GFLAGS),
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};
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