MediaTek driver updates for v6.16
This brings some cleanups to the MediaTek DVFSRC driver, commonizing the bandwidth constraints platform data, and also adds support for the DVFSRC hardware found in the MediaTek Dimensity 1200 MT6893 SoC. -----BEGIN PGP SIGNATURE----- iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCaBnSnygcYW5nZWxvZ2lv YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4zW0BANwa 3TZaLlpViiOcMixnIHO4GJRdAbBfCasRmUPfAbJ3AQDLxIYC7o5Z6VTtv/QOfsVW wA8RcvwJUdJ0ASsOcm5AAA== =ggB+ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgebrUACgkQYKtH/8kJ UicR/xAApFaq0hRkYSHRTiNMfCgJhCFMfouD+fmJEJlHwnn6i9997phb/eJlJGeL u4a3ti3aizZUXFzKWrbXspeZB2RvrujLS2ensQzkLo4Bb9P1D+qLU+wVa3BxvLjX h1pKXN0kbNOJhEbN0xDHPQjPHsaEMLhyKjOuHsSBkpM2pvz+xytVSmbvhFNu4Jj7 lBbkUFinSRnnhPKqwfMlJBxlW2BcWTlaMtXz/h/wM27Jb2THhkVmypgmilYj+ErA NE1jlYgDM1GZ4gNPFYWK2RvjEx1/Vr1PXaJBPs4pACpd4ovyStuacSeYbSI2USkt AKiqm8P96YtLb0HckMoxR7fQWsHsKEyrlzdgVxpYCdHbxZSefjbBtlXGfuL9XJ7q UC80AIBGQ5bTU/8e+TVn6tmBjBIRV+OINoQl0L7x+AiUKUAVFo5qwbJcT691Cxap a0dhfqJQlJF4bmHZQc5CJIj6y0pOgAGSGyNV/5kj0BuD4DI2Z2fozB3T3sUXCL1I t/aLNU1EloxF1ukvepPqc7jpZIvJdjC+5iZ8p/rM6DJcNbBB7JAje17BY28j6kOL 1fhNOSlOLqP/0n6yfoYwld1WsqEyQjsUXoIv/E0E1XOuAqHl2pCHh0KXrHLyRD+Z dn5TFXEu8ZrtJPZ/GynFAZVuWaMBddKX8KbI5cywCCw0YqzypcA= =Qf5M -----END PGP SIGNATURE----- Merge tag 'mtk-soc-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers MediaTek driver updates for v6.16 This brings some cleanups to the MediaTek DVFSRC driver, commonizing the bandwidth constraints platform data, and also adds support for the DVFSRC hardware found in the MediaTek Dimensity 1200 MT6893 SoC. * tag 'mtk-soc-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: soc: mediatek: mtk-dvfsrc: remove an unused variable soc: mediatek: mtk-dvfsrc: Add support for Dimensity 1200 MT6893 soc: mediatek: mtk-dvfsrc: Rename and move bw constraints data dt-bindings: soc: mediatek: dvfsrc: Add support for MT6893 Link: https://lore.kernel.org/r/20250506091736.125733-2-angelogioacchino.delregno@collabora.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
5dcee6dd09
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@ -23,6 +23,7 @@ properties:
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compatible:
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oneOf:
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- enum:
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- mediatek,mt6893-dvfsrc
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- mediatek,mt8183-dvfsrc
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- mediatek,mt8195-dvfsrc
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- items:
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@ -446,6 +446,46 @@ static int mtk_dvfsrc_probe(struct platform_device *pdev)
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return 0;
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}
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static const struct dvfsrc_bw_constraints dvfsrc_bw_constr_v1 = { 0, 0, 0 };
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static const struct dvfsrc_bw_constraints dvfsrc_bw_constr_v2 = {
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.max_dram_nom_bw = 255,
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.max_dram_peak_bw = 255,
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.max_dram_hrt_bw = 1023,
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};
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static const struct dvfsrc_opp dvfsrc_opp_mt6893_lp4[] = {
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{ 0, 0 }, { 1, 0 }, { 2, 0 }, { 3, 0 },
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{ 0, 1 }, { 1, 1 }, { 2, 1 }, { 3, 1 },
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{ 0, 2 }, { 1, 2 }, { 2, 2 }, { 3, 2 },
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{ 0, 3 }, { 1, 3 }, { 2, 3 }, { 3, 3 },
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{ 1, 4 }, { 2, 4 }, { 3, 4 }, { 2, 5 },
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{ 3, 5 }, { 3, 6 }, { 4, 6 }, { 4, 7 },
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};
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static const struct dvfsrc_opp_desc dvfsrc_opp_mt6893_desc[] = {
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[0] = {
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.opps = dvfsrc_opp_mt6893_lp4,
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.num_opp = ARRAY_SIZE(dvfsrc_opp_mt6893_lp4),
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}
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};
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static const struct dvfsrc_soc_data mt6893_data = {
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.opps_desc = dvfsrc_opp_mt6893_desc,
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.regs = dvfsrc_mt8195_regs,
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.get_target_level = dvfsrc_get_target_level_v2,
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.get_current_level = dvfsrc_get_current_level_v2,
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.get_vcore_level = dvfsrc_get_vcore_level_v2,
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.get_vscp_level = dvfsrc_get_vscp_level_v2,
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.set_dram_bw = dvfsrc_set_dram_bw_v1,
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.set_dram_peak_bw = dvfsrc_set_dram_peak_bw_v1,
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.set_dram_hrt_bw = dvfsrc_set_dram_hrt_bw_v1,
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.set_vcore_level = dvfsrc_set_vcore_level_v2,
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.set_vscp_level = dvfsrc_set_vscp_level_v2,
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.wait_for_opp_level = dvfsrc_wait_for_opp_level_v2,
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.wait_for_vcore_level = dvfsrc_wait_for_vcore_level_v1,
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.bw_constraints = &dvfsrc_bw_constr_v2,
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};
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static const struct dvfsrc_opp dvfsrc_opp_mt8183_lp4[] = {
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{ 0, 0 }, { 0, 1 }, { 0, 2 }, { 1, 2 },
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};
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@ -469,8 +509,6 @@ static const struct dvfsrc_opp_desc dvfsrc_opp_mt8183_desc[] = {
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}
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};
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static const struct dvfsrc_bw_constraints dvfsrc_bw_constr_mt8183 = { 0, 0, 0 };
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static const struct dvfsrc_soc_data mt8183_data = {
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.opps_desc = dvfsrc_opp_mt8183_desc,
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.regs = dvfsrc_mt8183_regs,
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@ -482,7 +520,7 @@ static const struct dvfsrc_soc_data mt8183_data = {
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.set_vcore_level = dvfsrc_set_vcore_level_v1,
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.wait_for_opp_level = dvfsrc_wait_for_opp_level_v1,
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.wait_for_vcore_level = dvfsrc_wait_for_vcore_level_v1,
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.bw_constraints = &dvfsrc_bw_constr_mt8183,
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.bw_constraints = &dvfsrc_bw_constr_v1,
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};
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static const struct dvfsrc_opp dvfsrc_opp_mt8195_lp4[] = {
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@ -501,12 +539,6 @@ static const struct dvfsrc_opp_desc dvfsrc_opp_mt8195_desc[] = {
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}
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};
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static const struct dvfsrc_bw_constraints dvfsrc_bw_constr_mt8195 = {
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.max_dram_nom_bw = 255,
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.max_dram_peak_bw = 255,
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.max_dram_hrt_bw = 1023,
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};
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static const struct dvfsrc_soc_data mt8195_data = {
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.opps_desc = dvfsrc_opp_mt8195_desc,
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.regs = dvfsrc_mt8195_regs,
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@ -521,10 +553,11 @@ static const struct dvfsrc_soc_data mt8195_data = {
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.set_vscp_level = dvfsrc_set_vscp_level_v2,
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.wait_for_opp_level = dvfsrc_wait_for_opp_level_v2,
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.wait_for_vcore_level = dvfsrc_wait_for_vcore_level_v1,
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.bw_constraints = &dvfsrc_bw_constr_mt8195,
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.bw_constraints = &dvfsrc_bw_constr_v2,
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};
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static const struct of_device_id mtk_dvfsrc_of_match[] = {
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{ .compatible = "mediatek,mt6893-dvfsrc", .data = &mt6893_data },
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{ .compatible = "mediatek,mt8183-dvfsrc", .data = &mt8183_data },
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{ .compatible = "mediatek,mt8195-dvfsrc", .data = &mt8195_data },
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{ /* sentinel */ }
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