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spi-geni-qcom: rework setup_fifo_params 

Update each register only if it changes.

This also fixes the chipselect related registers not being changed when
chipselect changes but not the mode.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://patch.msgid.link/20251120211204.24078-5-jonathan@marek.ca
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jonathan Marek 2025-11-20 16:12:02 -05:00 committed by Mark Brown
parent 739062a9f1
commit 781c3e71c9
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GPG Key ID: 24D68B725D5487D0
1 changed files with 18 additions and 26 deletions
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44
drivers/spi/spi-geni-qcom.c
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@ -82,6 +82,7 @@ struct spi_geni_master {
u32 fifo_width_bits; u32 fifo_width_bits;
u32 tx_wm; u32 tx_wm;
u32 last_mode; u32 last_mode;
u8 last_cs;
unsigned long cur_speed_hz; unsigned long cur_speed_hz;
unsigned long cur_sclk_hz; unsigned long cur_sclk_hz;
unsigned int cur_bits_per_word; unsigned int cur_bits_per_word;
@ -350,34 +351,25 @@ static int setup_fifo_params(struct spi_device *spi_slv,
{ {
struct spi_geni_master *mas = spi_controller_get_devdata(spi); struct spi_geni_master *mas = spi_controller_get_devdata(spi);
struct geni_se *se = &mas->se; struct geni_se *se = &mas->se;
u32 loopback_cfg = 0, cpol = 0, cpha = 0, demux_output_inv = 0; u8 chipselect = spi_get_chipselect(spi_slv, 0);
u32 demux_sel; bool cs_changed = (mas->last_cs != chipselect);
u32 mode_changed = mas->last_mode ^ spi_slv->mode;
if (mas->last_mode != spi_slv->mode) { mas->last_cs = chipselect;
if (spi_slv->mode & SPI_LOOP) mas->last_mode = spi_slv->mode;
loopback_cfg = LOOPBACK_ENABLE;
if (spi_slv->mode & SPI_CPOL) if (mode_changed & SPI_LSB_FIRST)
cpol = CPOL; mas->cur_bits_per_word = 0; /* force next setup_se_xfer to call spi_setup_word_len */
if (mode_changed & SPI_LOOP)
if (spi_slv->mode & SPI_CPHA) writel((spi_slv->mode & SPI_LOOP) ? LOOPBACK_ENABLE : 0, se->base + SE_SPI_LOOPBACK);
cpha = CPHA; if (cs_changed)
writel(chipselect, se->base + SE_SPI_DEMUX_SEL);
if (spi_slv->mode & SPI_CS_HIGH) if (mode_changed & SE_SPI_CPHA)
demux_output_inv = BIT(spi_get_chipselect(spi_slv, 0)); writel((spi_slv->mode & SPI_CPHA) ? CPHA : 0, se->base + SE_SPI_CPHA);
if (mode_changed & SE_SPI_CPOL)
demux_sel = spi_get_chipselect(spi_slv, 0); writel((spi_slv->mode & SPI_CPOL) ? CPOL : 0, se->base + SE_SPI_CPOL);
mas->cur_bits_per_word = spi_slv->bits_per_word; if ((mode_changed & SPI_CS_HIGH) || (cs_changed && (spi_slv->mode & SPI_CS_HIGH)))
writel((spi_slv->mode & SPI_CS_HIGH) ? BIT(chipselect) : 0, se->base + SE_SPI_DEMUX_OUTPUT_INV);
spi_setup_word_len(mas, spi_slv->mode, spi_slv->bits_per_word);
writel(loopback_cfg, se->base + SE_SPI_LOOPBACK);
writel(demux_sel, se->base + SE_SPI_DEMUX_SEL);
writel(cpha, se->base + SE_SPI_CPHA);
writel(cpol, se->base + SE_SPI_CPOL);
writel(demux_output_inv, se->base + SE_SPI_DEMUX_OUTPUT_INV);
mas->last_mode = spi_slv->mode;
}
return 0; return 0;
} }