spi: Make SPI core to take care of fwnode
Merge series from Andy Shevchenko <andriy.shevchenko@linux.intel.com>: It seems all of the SPI drivers want to propagate fwnode (or of_node) of the physical device to the SPI device. Make sure we don't duplicate it over and over in each new driver (+2 in this cycle) by making core to take care of that. Note, similar is done already by IIO and I²C subsystems. There is one noticeable and quite specific case that is taken care in the first patch and now we have a confirmation from Cirrus that everything is okay. The rest is just a mechanical conversion after checking that the parent device is assigned to the same that provides the respective fwnode. Changelog v2: - collected tags - fixed W=1 warning (unused variable) in spi-dln2.c (LKP) v1: 20260108203004.3538449-1-andriy.shevchenko@linux.intel.com Andy Shevchenko (4): spi: Propagate default fwnode to the SPI controller device spi: Drop duplicate of_node assignment spi: Drop duplicate fwnode assignment spi: Drop duplicate device_set_node() call drivers/spi/atmel-quadspi.c | 1 - drivers/spi/spi-airoha-snfi.c | 1 - drivers/spi/spi-altera-platform.c | 2 -- drivers/spi/spi-amlogic-spifc-a1.c | 1 - drivers/spi/spi-amlogic-spisg.c | 1 - drivers/spi/spi-apple.c | 1 - drivers/spi/spi-ar934x.c | 1 - drivers/spi/spi-armada-3700.c | 4 +--- drivers/spi/spi-aspeed-smc.c | 1 - drivers/spi/spi-atcspi200.c | 1 - drivers/spi/spi-ath79.c | 1 - drivers/spi/spi-atmel.c | 1 - drivers/spi/spi-axi-spi-engine.c | 1 - drivers/spi/spi-bcm-qspi.c | 1 - drivers/spi/spi-bcm2835.c | 1 - drivers/spi/spi-bcm2835aux.c | 1 - drivers/spi/spi-bcm63xx-hsspi.c | 1 - drivers/spi/spi-bcm63xx.c | 1 - drivers/spi/spi-bcmbca-hsspi.c | 1 - drivers/spi/spi-cadence-quadspi.c | 1 - drivers/spi/spi-cadence-xspi.c | 1 - drivers/spi/spi-cadence.c | 1 - drivers/spi/spi-cavium-octeon.c | 1 - drivers/spi/spi-cavium-thunderx.c | 1 - drivers/spi/spi-clps711x.c | 1 - drivers/spi/spi-cs42l43.c | 8 ++++++++ drivers/spi/spi-davinci.c | 1 - drivers/spi/spi-dln2.c | 3 --- drivers/spi/spi-dw-core.c | 2 -- drivers/spi/spi-ep93xx.c | 1 - drivers/spi/spi-falcon.c | 1 - drivers/spi/spi-fsl-dspi.c | 1 - drivers/spi/spi-fsl-espi.c | 1 - drivers/spi/spi-fsl-lib.c | 1 - drivers/spi/spi-fsl-lpspi.c | 1 - drivers/spi/spi-geni-qcom.c | 1 - drivers/spi/spi-gpio.c | 1 - drivers/spi/spi-gxp.c | 1 - drivers/spi/spi-hisi-kunpeng.c | 1 - drivers/spi/spi-img-spfi.c | 1 - drivers/spi/spi-imx.c | 1 - drivers/spi/spi-ingenic.c | 1 - drivers/spi/spi-lantiq-ssc.c | 1 - drivers/spi/spi-ljca.c | 1 - drivers/spi/spi-loongson-core.c | 1 - drivers/spi/spi-lp8841-rtc.c | 1 - drivers/spi/spi-meson-spicc.c | 1 - drivers/spi/spi-meson-spifc.c | 1 - drivers/spi/spi-microchip-core-spi.c | 1 - drivers/spi/spi-mpc512x-psc.c | 2 -- drivers/spi/spi-mpc52xx-psc.c | 2 -- drivers/spi/spi-mpc52xx.c | 1 - drivers/spi/spi-mpfs.c | 1 - drivers/spi/spi-mt65xx.c | 1 - drivers/spi/spi-mt7621.c | 1 - drivers/spi/spi-mtk-nor.c | 1 - drivers/spi/spi-mtk-snfi.c | 1 - drivers/spi/spi-mux.c | 1 - drivers/spi/spi-mxic.c | 1 - drivers/spi/spi-npcm-fiu.c | 1 - drivers/spi/spi-npcm-pspi.c | 1 - drivers/spi/spi-nxp-fspi.c | 2 -- drivers/spi/spi-nxp-xspi.c | 1 - drivers/spi/spi-oc-tiny.c | 1 - drivers/spi/spi-orion.c | 1 - drivers/spi/spi-pl022.c | 1 - drivers/spi/spi-pxa2xx.c | 2 -- drivers/spi/spi-qcom-qspi.c | 1 - drivers/spi/spi-qpic-snand.c | 1 - drivers/spi/spi-qup.c | 1 - drivers/spi/spi-rb4xx.c | 1 - drivers/spi/spi-realtek-rtl-snand.c | 1 - drivers/spi/spi-realtek-rtl.c | 1 - drivers/spi/spi-rockchip-sfc.c | 1 - drivers/spi/spi-rockchip.c | 1 - drivers/spi/spi-rspi.c | 1 - drivers/spi/spi-rzv2h-rspi.c | 2 -- drivers/spi/spi-rzv2m-csi.c | 2 -- drivers/spi/spi-s3c64xx.c | 1 - drivers/spi/spi-sc18is602.c | 2 -- drivers/spi/spi-sg2044-nor.c | 1 - drivers/spi/spi-sh-hspi.c | 1 - drivers/spi/spi-sh-msiof.c | 1 - drivers/spi/spi-sifive.c | 1 - drivers/spi/spi-slave-mt27xx.c | 1 - drivers/spi/spi-sn-f-ospi.c | 1 - drivers/spi/spi-sprd-adi.c | 1 - drivers/spi/spi-sprd.c | 1 - drivers/spi/spi-stm32-ospi.c | 1 - drivers/spi/spi-stm32-qspi.c | 1 - drivers/spi/spi-stm32.c | 1 - drivers/spi/spi-sun4i.c | 1 - drivers/spi/spi-sun6i.c | 1 - drivers/spi/spi-sunplus-sp7021.c | 1 - drivers/spi/spi-synquacer.c | 3 --- drivers/spi/spi-tegra114.c | 1 - drivers/spi/spi-tegra20-sflash.c | 1 - drivers/spi/spi-tegra20-slink.c | 1 - drivers/spi/spi-tegra210-quad.c | 1 - drivers/spi/spi-ti-qspi.c | 1 - drivers/spi/spi-uniphier.c | 1 - drivers/spi/spi-virtio.c | 2 -- drivers/spi/spi-wpcm-fiu.c | 1 - drivers/spi/spi-xcomm.c | 1 - drivers/spi/spi-xilinx.c | 1 - drivers/spi/spi-xlp.c | 1 - drivers/spi/spi-xtensa-xtfpga.c | 1 - drivers/spi/spi.c | 3 +++ 108 files changed, 12 insertions(+), 122 deletions(-) -- 2.50.1
This commit is contained in:
Mark Brown
commit
8f7745fcb4
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@ -1382,7 +1382,6 @@ static int atmel_qspi_probe(struct platform_device *pdev)
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ctrl->bus_num = -1;
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ctrl->mem_ops = &atmel_qspi_mem_ops;
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ctrl->num_chipselect = 1;
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ctrl->dev.of_node = pdev->dev.of_node;
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platform_set_drvdata(pdev, ctrl);
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/* Map the registers */
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@ -1124,7 +1124,6 @@ static int airoha_snand_probe(struct platform_device *pdev)
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ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
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ctrl->mode_bits = SPI_RX_DUAL;
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ctrl->setup = airoha_snand_setup;
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device_set_node(&ctrl->dev, dev_fwnode(dev));
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err = airoha_snand_nfi_init(as_ctrl);
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if (err)
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@ -67,8 +67,6 @@ static int altera_spi_probe(struct platform_device *pdev)
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host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
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}
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host->dev.of_node = pdev->dev.of_node;
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hw = spi_controller_get_devdata(host);
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hw->dev = &pdev->dev;
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@ -358,7 +358,6 @@ static int amlogic_spifc_a1_probe(struct platform_device *pdev)
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return ret;
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ctrl->num_chipselect = 1;
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ctrl->dev.of_node = pdev->dev.of_node;
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ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
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ctrl->auto_runtime_pm = true;
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ctrl->mem_ops = &amlogic_spifc_a1_mem_ops;
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@ -781,7 +781,6 @@ static int aml_spisg_probe(struct platform_device *pdev)
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pm_runtime_resume_and_get(&spisg->pdev->dev);
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ctlr->num_chipselect = 4;
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ctlr->dev.of_node = pdev->dev.of_node;
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ctlr->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST |
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SPI_3WIRE | SPI_TX_QUAD | SPI_RX_QUAD;
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ctlr->max_speed_hz = 1000 * 1000 * 100;
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@ -485,7 +485,6 @@ static int apple_spi_probe(struct platform_device *pdev)
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if (ret)
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return dev_err_probe(&pdev->dev, ret, "Unable to bind to interrupt\n");
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ctlr->dev.of_node = pdev->dev.of_node;
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ctlr->bus_num = pdev->id;
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ctlr->num_chipselect = 1;
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ctlr->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST;
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@ -195,7 +195,6 @@ static int ar934x_spi_probe(struct platform_device *pdev)
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ctlr->transfer_one_message = ar934x_spi_transfer_one_message;
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ctlr->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(24) |
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SPI_BPW_MASK(16) | SPI_BPW_MASK(8);
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ctlr->dev.of_node = pdev->dev.of_node;
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ctlr->num_chipselect = 3;
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dev_set_drvdata(&pdev->dev, ctlr);
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@ -813,7 +813,6 @@ MODULE_DEVICE_TABLE(of, a3700_spi_dt_ids);
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static int a3700_spi_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *of_node = dev->of_node;
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struct spi_controller *host;
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struct a3700_spi *spi;
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u32 num_cs = 0;
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@ -826,14 +825,13 @@ static int a3700_spi_probe(struct platform_device *pdev)
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goto out;
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}
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if (of_property_read_u32(of_node, "num-cs", &num_cs)) {
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if (of_property_read_u32(dev->of_node, "num-cs", &num_cs)) {
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dev_err(dev, "could not find num-cs\n");
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ret = -ENXIO;
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goto error;
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}
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host->bus_num = pdev->id;
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host->dev.of_node = of_node;
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host->mode_bits = SPI_MODE_3;
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host->num_chipselect = num_cs;
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host->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(32);
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@ -898,7 +898,6 @@ static int aspeed_spi_probe(struct platform_device *pdev)
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ctlr->setup = aspeed_spi_setup;
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ctlr->cleanup = aspeed_spi_cleanup;
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ctlr->num_chipselect = of_get_available_child_count(dev->of_node);
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ctlr->dev.of_node = dev->of_node;
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aspi->num_cs = ctlr->num_chipselect;
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@ -552,7 +552,6 @@ static void atcspi_init_controller(struct platform_device *pdev,
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/* Initialize controller properties */
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host->bus_num = pdev->id;
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host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_QUAD | SPI_TX_QUAD;
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host->dev.of_node = pdev->dev.of_node;
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host->num_chipselect = ATCSPI_MAX_CS_NUM;
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host->mem_ops = &atcspi_mem_ops;
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host->max_speed_hz = spi->sclk_rate;
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@ -180,7 +180,6 @@ static int ath79_spi_probe(struct platform_device *pdev)
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}
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sp = spi_controller_get_devdata(host);
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host->dev.of_node = pdev->dev.of_node;
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platform_set_drvdata(pdev, sp);
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host->use_gpio_descriptors = true;
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@ -1536,7 +1536,6 @@ static int atmel_spi_probe(struct platform_device *pdev)
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host->use_gpio_descriptors = true;
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host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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host->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16);
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host->dev.of_node = pdev->dev.of_node;
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host->bus_num = pdev->id;
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host->num_chipselect = 4;
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host->setup = atmel_spi_setup;
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@ -1080,7 +1080,6 @@ static int spi_engine_probe(struct platform_device *pdev)
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if (ret)
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return ret;
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host->dev.of_node = pdev->dev.of_node;
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host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE;
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host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
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host->max_speed_hz = clk_get_rate(spi_engine->ref_clk) / 2;
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@ -1529,7 +1529,6 @@ int bcm_qspi_probe(struct platform_device *pdev,
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host->transfer_one = bcm_qspi_transfer_one;
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host->mem_ops = &bcm_qspi_mem_ops;
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host->cleanup = bcm_qspi_cleanup;
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host->dev.of_node = dev->of_node;
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host->num_chipselect = NUM_CHIPSELECT;
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host->use_gpio_descriptors = true;
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@ -1368,7 +1368,6 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
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ctlr->transfer_one = bcm2835_spi_transfer_one;
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ctlr->handle_err = bcm2835_spi_handle_err;
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ctlr->prepare_message = bcm2835_spi_prepare_message;
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ctlr->dev.of_node = pdev->dev.of_node;
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bs = spi_controller_get_devdata(ctlr);
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bs->ctlr = ctlr;
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@ -502,7 +502,6 @@ static int bcm2835aux_spi_probe(struct platform_device *pdev)
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host->handle_err = bcm2835aux_spi_handle_err;
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host->prepare_message = bcm2835aux_spi_prepare_message;
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host->unprepare_message = bcm2835aux_spi_unprepare_message;
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host->dev.of_node = pdev->dev.of_node;
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host->use_gpio_descriptors = true;
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bs = spi_controller_get_devdata(host);
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@ -822,7 +822,6 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev)
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init_completion(&bs->done);
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host->mem_ops = &bcm63xx_hsspi_mem_ops;
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host->dev.of_node = dev->of_node;
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if (!dev->of_node)
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host->bus_num = HSSPI_BUS_NUM;
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@ -571,7 +571,6 @@ static int bcm63xx_spi_probe(struct platform_device *pdev)
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goto out_err;
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}
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host->dev.of_node = dev->of_node;
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host->bus_num = bus_num;
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host->num_chipselect = num_cs;
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host->transfer_one_message = bcm63xx_spi_transfer_one;
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@ -500,7 +500,6 @@ static int bcmbca_hsspi_probe(struct platform_device *pdev)
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mutex_init(&bs->msg_mutex);
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init_completion(&bs->done);
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host->dev.of_node = dev->of_node;
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if (!dev->of_node)
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host->bus_num = HSSPI_BUS_NUM;
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@ -1827,7 +1827,6 @@ static int cqspi_probe(struct platform_device *pdev)
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host->mode_bits = SPI_RX_QUAD | SPI_RX_DUAL;
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host->mem_ops = &cqspi_mem_ops;
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host->mem_caps = &cqspi_mem_caps;
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host->dev.of_node = pdev->dev.of_node;
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cqspi = spi_controller_get_devdata(host);
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@ -1157,7 +1157,6 @@ static int cdns_xspi_probe(struct platform_device *pdev)
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cdns_xspi->sdma_handler = &cdns_xspi_sdma_handle;
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cdns_xspi->set_interrupts_handler = &cdns_xspi_set_interrupts;
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}
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host->dev.of_node = pdev->dev.of_node;
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host->bus_num = -1;
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platform_set_drvdata(pdev, host);
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@ -651,7 +651,6 @@ static int cdns_spi_probe(struct platform_device *pdev)
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return -ENOMEM;
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xspi = spi_controller_get_devdata(ctlr);
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ctlr->dev.of_node = pdev->dev.of_node;
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platform_set_drvdata(pdev, ctlr);
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xspi->regs = devm_platform_ioremap_resource(pdev, 0);
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@ -54,7 +54,6 @@ static int octeon_spi_probe(struct platform_device *pdev)
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host->bits_per_word_mask = SPI_BPW_MASK(8);
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host->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
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host->dev.of_node = pdev->dev.of_node;
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err = devm_spi_register_controller(&pdev->dev, host);
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if (err) {
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dev_err(&pdev->dev, "register host failed: %d\n", err);
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@ -67,7 +67,6 @@ static int thunderx_spi_probe(struct pci_dev *pdev,
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host->transfer_one_message = octeon_spi_transfer_one_message;
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host->bits_per_word_mask = SPI_BPW_MASK(8);
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host->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
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host->dev.of_node = pdev->dev.of_node;
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pci_set_drvdata(pdev, host);
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@ -107,7 +107,6 @@ static int spi_clps711x_probe(struct platform_device *pdev)
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host->bus_num = -1;
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host->mode_bits = SPI_CPHA | SPI_CS_HIGH;
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host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8);
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host->dev.of_node = pdev->dev.of_node;
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host->prepare_message = spi_clps711x_prepare_message;
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host->transfer_one = spi_clps711x_transfer_one;
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@ -371,6 +371,14 @@ static int cs42l43_spi_probe(struct platform_device *pdev)
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fwnode_property_read_u32(xu_fwnode, "01fa-sidecar-instances", &nsidecars);
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/*
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* Depending on the value of nsidecars we either create a software node
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* or assign an fwnode. We don't want software node to be attached to
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* the default one. That's why we need to clear the SPI controller fwnode
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* first.
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*/
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device_set_node(&priv->ctlr->dev, NULL);
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if (nsidecars) {
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struct software_node_ref_args args[] = {
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SOFTWARE_NODE_REFERENCE(fwnode, 0, GPIO_ACTIVE_LOW),
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@ -988,7 +988,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
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}
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host->use_gpio_descriptors = true;
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host->dev.of_node = pdev->dev.of_node;
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host->bus_num = pdev->id;
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host->num_chipselect = pdata->num_chipselect;
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host->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16);
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@ -682,15 +682,12 @@ static int dln2_spi_probe(struct platform_device *pdev)
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struct spi_controller *host;
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struct dln2_spi *dln2;
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struct dln2_platform_data *pdata = dev_get_platdata(&pdev->dev);
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struct device *dev = &pdev->dev;
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int ret;
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host = spi_alloc_host(&pdev->dev, sizeof(*dln2));
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if (!host)
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return -ENOMEM;
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device_set_node(&host->dev, dev_fwnode(dev));
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platform_set_drvdata(pdev, host);
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dln2 = spi_controller_get_devdata(host);
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|
|
@ -936,8 +936,6 @@ int dw_spi_add_controller(struct device *dev, struct dw_spi *dws)
|
|||
if (!ctlr)
|
||||
return -ENOMEM;
|
||||
|
||||
device_set_node(&ctlr->dev, dev_fwnode(dev));
|
||||
|
||||
dws->ctlr = ctlr;
|
||||
dws->dma_addr = (dma_addr_t)(dws->paddr + DW_SPI_DR);
|
||||
|
||||
|
|
|
|||
|
|
@ -689,7 +689,6 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
|
|||
/* make sure that the hardware is disabled */
|
||||
writel(0, espi->mmio + SSPCR1);
|
||||
|
||||
device_set_node(&host->dev, dev_fwnode(&pdev->dev));
|
||||
error = devm_spi_register_controller(&pdev->dev, host);
|
||||
if (error) {
|
||||
dev_err(&pdev->dev, "failed to register SPI host\n");
|
||||
|
|
|
|||
|
|
@ -405,7 +405,6 @@ static int falcon_sflash_probe(struct platform_device *pdev)
|
|||
host->flags = SPI_CONTROLLER_HALF_DUPLEX;
|
||||
host->setup = falcon_sflash_setup;
|
||||
host->transfer_one_message = falcon_sflash_xfer_one;
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
|
||||
ret = devm_spi_register_controller(&pdev->dev, host);
|
||||
if (ret)
|
||||
|
|
|
|||
|
|
@ -1555,7 +1555,6 @@ static int dspi_probe(struct platform_device *pdev)
|
|||
|
||||
ctlr->setup = dspi_setup;
|
||||
ctlr->transfer_one_message = dspi_transfer_one_message;
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
|
||||
ctlr->cleanup = dspi_cleanup;
|
||||
ctlr->target_abort = dspi_target_abort;
|
||||
|
|
|
|||
|
|
@ -675,7 +675,6 @@ static int fsl_espi_probe(struct device *dev, struct resource *mem,
|
|||
|
||||
host->mode_bits = SPI_RX_DUAL | SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
|
||||
SPI_LSB_FIRST | SPI_LOOP;
|
||||
host->dev.of_node = dev->of_node;
|
||||
host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
|
||||
host->setup = fsl_espi_setup;
|
||||
host->cleanup = fsl_espi_cleanup;
|
||||
|
|
|
|||
|
|
@ -91,7 +91,6 @@ void mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
|
|||
ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
|
||||
| SPI_LSB_FIRST | SPI_LOOP;
|
||||
|
||||
ctlr->dev.of_node = dev->of_node;
|
||||
|
||||
mpc8xxx_spi = spi_controller_get_devdata(ctlr);
|
||||
mpc8xxx_spi->dev = dev;
|
||||
|
|
|
|||
|
|
@ -949,7 +949,6 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
|
|||
controller->unprepare_transfer_hardware = lpspi_unprepare_xfer_hardware;
|
||||
controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
|
||||
controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX;
|
||||
controller->dev.of_node = pdev->dev.of_node;
|
||||
controller->bus_num = pdev->id;
|
||||
controller->num_chipselect = num_cs;
|
||||
controller->target_abort = fsl_lpspi_target_abort;
|
||||
|
|
|
|||
|
|
@ -1057,7 +1057,6 @@ static int spi_geni_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
spi->bus_num = -1;
|
||||
spi->dev.of_node = dev->of_node;
|
||||
spi->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_CS_HIGH;
|
||||
spi->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
|
||||
spi->num_chipselect = 4;
|
||||
|
|
|
|||
|
|
@ -351,7 +351,6 @@ static int spi_gpio_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
|
||||
if (fwnode) {
|
||||
device_set_node(&host->dev, fwnode);
|
||||
host->use_gpio_descriptors = true;
|
||||
} else {
|
||||
status = spi_gpio_probe_pdata(pdev, host);
|
||||
|
|
|
|||
|
|
@ -284,7 +284,6 @@ static int gxp_spifi_probe(struct platform_device *pdev)
|
|||
ctlr->mem_ops = &gxp_spi_mem_ops;
|
||||
ctlr->setup = gxp_spi_setup;
|
||||
ctlr->num_chipselect = data->max_cs;
|
||||
ctlr->dev.of_node = dev->of_node;
|
||||
|
||||
ret = devm_spi_register_controller(dev, ctlr);
|
||||
if (ret) {
|
||||
|
|
|
|||
|
|
@ -497,7 +497,6 @@ static int hisi_spi_probe(struct platform_device *pdev)
|
|||
host->cleanup = hisi_spi_cleanup;
|
||||
host->transfer_one = hisi_spi_transfer_one;
|
||||
host->handle_err = hisi_spi_handle_err;
|
||||
host->dev.fwnode = dev->fwnode;
|
||||
host->min_speed_hz = DIV_ROUND_UP(host->max_speed_hz, CLK_DIV_MAX);
|
||||
|
||||
hisi_spi_hw_init(hs);
|
||||
|
|
|
|||
|
|
@ -587,7 +587,6 @@ static int img_spfi_probe(struct platform_device *pdev)
|
|||
host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_TX_DUAL | SPI_RX_DUAL;
|
||||
if (of_property_read_bool(spfi->dev->of_node, "img,supports-quad-mode"))
|
||||
host->mode_bits |= SPI_TX_QUAD | SPI_RX_QUAD;
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(8);
|
||||
host->max_speed_hz = clk_get_rate(spfi->spfi_clk) / 4;
|
||||
host->min_speed_hz = clk_get_rate(spfi->spfi_clk) / 512;
|
||||
|
|
|
|||
|
|
@ -2368,7 +2368,6 @@ static int spi_imx_probe(struct platform_device *pdev)
|
|||
|
||||
spi_imx->devtype_data->intctrl(spi_imx, 0);
|
||||
|
||||
controller->dev.of_node = pdev->dev.of_node;
|
||||
ret = spi_register_controller(controller);
|
||||
if (ret) {
|
||||
dev_err_probe(&pdev->dev, ret, "register controller failed\n");
|
||||
|
|
|
|||
|
|
@ -442,7 +442,6 @@ static int spi_ingenic_probe(struct platform_device *pdev)
|
|||
ctlr->use_gpio_descriptors = true;
|
||||
ctlr->max_native_cs = pdata->max_native_cs;
|
||||
ctlr->num_chipselect = num_cs;
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
|
||||
if (spi_ingenic_request_dma(ctlr, dev))
|
||||
dev_warn(dev, "DMA not available.\n");
|
||||
|
|
|
|||
|
|
@ -962,7 +962,6 @@ static int lantiq_ssc_probe(struct platform_device *pdev)
|
|||
spi->bits_per_word = 8;
|
||||
spi->speed_hz = 0;
|
||||
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->num_chipselect = num_cs;
|
||||
host->use_gpio_descriptors = true;
|
||||
host->setup = lantiq_ssc_setup;
|
||||
|
|
|
|||
|
|
@ -238,7 +238,6 @@ static int ljca_spi_probe(struct auxiliary_device *auxdev,
|
|||
controller->auto_runtime_pm = false;
|
||||
controller->max_speed_hz = LJCA_SPI_BUS_MAX_HZ;
|
||||
|
||||
device_set_node(&ljca_spi->controller->dev, dev_fwnode(&auxdev->dev));
|
||||
auxiliary_set_drvdata(auxdev, controller);
|
||||
|
||||
ret = spi_register_controller(controller);
|
||||
|
|
|
|||
|
|
@ -210,7 +210,6 @@ int loongson_spi_init_controller(struct device *dev, void __iomem *regs)
|
|||
controller->unprepare_message = loongson_spi_unprepare_message;
|
||||
controller->set_cs = loongson_spi_set_cs;
|
||||
controller->num_chipselect = 4;
|
||||
device_set_node(&controller->dev, dev_fwnode(dev));
|
||||
dev_set_drvdata(dev, controller);
|
||||
|
||||
spi = spi_controller_get_devdata(controller);
|
||||
|
|
|
|||
|
|
@ -200,7 +200,6 @@ spi_lp8841_rtc_probe(struct platform_device *pdev)
|
|||
host->transfer_one = spi_lp8841_rtc_transfer_one;
|
||||
host->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
#ifdef CONFIG_OF
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
#endif
|
||||
|
||||
data = spi_controller_get_devdata(host);
|
||||
|
|
|
|||
|
|
@ -1054,7 +1054,6 @@ static int meson_spicc_probe(struct platform_device *pdev)
|
|||
device_reset_optional(&pdev->dev);
|
||||
|
||||
host->num_chipselect = 4;
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LOOP;
|
||||
host->flags = (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX);
|
||||
host->min_speed_hz = spicc->data->min_speed_hz;
|
||||
|
|
|
|||
|
|
@ -322,7 +322,6 @@ static int meson_spifc_probe(struct platform_device *pdev)
|
|||
rate = clk_get_rate(spifc->clk);
|
||||
|
||||
host->num_chipselect = 1;
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
host->auto_runtime_pm = true;
|
||||
host->transfer_one = meson_spifc_transfer_one;
|
||||
|
|
|
|||
|
|
@ -360,7 +360,6 @@ static int mchp_corespi_probe(struct platform_device *pdev)
|
|||
host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
|
||||
host->transfer_one = mchp_corespi_transfer_one;
|
||||
host->set_cs = mchp_corespi_set_cs;
|
||||
host->dev.of_node = dev->of_node;
|
||||
|
||||
ret = of_property_read_u32(dev->of_node, "fifo-depth", &spi->fifo_depth);
|
||||
if (ret)
|
||||
|
|
|
|||
|
|
@ -480,8 +480,6 @@ static int mpc512x_psc_spi_of_probe(struct platform_device *pdev)
|
|||
host->use_gpio_descriptors = true;
|
||||
host->cleanup = mpc512x_psc_spi_cleanup;
|
||||
|
||||
device_set_node(&host->dev, dev_fwnode(dev));
|
||||
|
||||
tempp = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
|
||||
if (IS_ERR(tempp))
|
||||
return dev_err_probe(dev, PTR_ERR(tempp), "could not ioremap I/O port range\n");
|
||||
|
|
|
|||
|
|
@ -319,8 +319,6 @@ static int mpc52xx_psc_spi_of_probe(struct platform_device *pdev)
|
|||
host->transfer_one_message = mpc52xx_psc_spi_transfer_one_message;
|
||||
host->cleanup = mpc52xx_psc_spi_cleanup;
|
||||
|
||||
device_set_node(&host->dev, dev_fwnode(dev));
|
||||
|
||||
mps->psc = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
|
||||
if (IS_ERR(mps->psc))
|
||||
return dev_err_probe(dev, PTR_ERR(mps->psc), "could not ioremap I/O port range\n");
|
||||
|
|
|
|||
|
|
@ -430,7 +430,6 @@ static int mpc52xx_spi_probe(struct platform_device *op)
|
|||
host->transfer = mpc52xx_spi_transfer;
|
||||
host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
|
||||
host->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
host->dev.of_node = op->dev.of_node;
|
||||
|
||||
platform_set_drvdata(op, host);
|
||||
|
||||
|
|
|
|||
|
|
@ -550,7 +550,6 @@ static int mpfs_spi_probe(struct platform_device *pdev)
|
|||
host->transfer_one = mpfs_spi_transfer_one;
|
||||
host->prepare_message = mpfs_spi_prepare_message;
|
||||
host->set_cs = mpfs_spi_set_cs;
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
|
||||
spi = spi_controller_get_devdata(host);
|
||||
|
||||
|
|
|
|||
|
|
@ -1184,7 +1184,6 @@ static int mtk_spi_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
|
||||
host->auto_runtime_pm = true;
|
||||
host->dev.of_node = dev->of_node;
|
||||
host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
|
||||
|
||||
host->set_cs = mtk_spi_set_cs;
|
||||
|
|
|
|||
|
|
@ -348,7 +348,6 @@ static int mt7621_spi_probe(struct platform_device *pdev)
|
|||
host->set_cs = mt7621_spi_set_native_cs;
|
||||
host->transfer_one = mt7621_spi_transfer_one;
|
||||
host->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->max_native_cs = MT7621_NATIVE_CS_COUNT;
|
||||
host->num_chipselect = MT7621_NATIVE_CS_COUNT;
|
||||
host->use_gpio_descriptors = true;
|
||||
|
|
|
|||
|
|
@ -851,7 +851,6 @@ static int mtk_nor_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
ctlr->max_message_size = mtk_max_msg_size;
|
||||
ctlr->mem_ops = &mtk_nor_mem_ops;
|
||||
ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_DUAL | SPI_TX_QUAD;
|
||||
|
|
|
|||
|
|
@ -1448,7 +1448,6 @@ static int mtk_snand_probe(struct platform_device *pdev)
|
|||
ctlr->mem_caps = &mtk_snand_mem_caps;
|
||||
ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_DUAL | SPI_TX_QUAD;
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
ret = spi_register_controller(ctlr);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "spi_register_controller failed.\n");
|
||||
|
|
|
|||
|
|
@ -161,7 +161,6 @@ static int spi_mux_probe(struct spi_device *spi)
|
|||
ctlr->setup = spi_mux_setup;
|
||||
ctlr->num_chipselect = mux_control_states(priv->mux);
|
||||
ctlr->bus_num = -1;
|
||||
ctlr->dev.of_node = spi->dev.of_node;
|
||||
ctlr->must_async = true;
|
||||
ctlr->defer_optimize_message = true;
|
||||
|
||||
|
|
|
|||
|
|
@ -768,7 +768,6 @@ static int mxic_spi_probe(struct platform_device *pdev)
|
|||
mxic = spi_controller_get_devdata(host);
|
||||
mxic->dev = &pdev->dev;
|
||||
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
|
||||
mxic->ps_clk = devm_clk_get(&pdev->dev, "ps_clk");
|
||||
if (IS_ERR(mxic->ps_clk))
|
||||
|
|
|
|||
|
|
@ -746,7 +746,6 @@ static int npcm_fiu_probe(struct platform_device *pdev)
|
|||
ctrl->bus_num = -1;
|
||||
ctrl->mem_ops = &npcm_fiu_mem_ops;
|
||||
ctrl->num_chipselect = fiu->info->max_cs;
|
||||
ctrl->dev.of_node = dev->of_node;
|
||||
|
||||
return devm_spi_register_controller(dev, ctrl);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -401,7 +401,6 @@ static int npcm_pspi_probe(struct platform_device *pdev)
|
|||
host->max_speed_hz = DIV_ROUND_UP(clk_hz, NPCM_PSPI_MIN_CLK_DIVIDER);
|
||||
host->min_speed_hz = DIV_ROUND_UP(clk_hz, NPCM_PSPI_MAX_CLK_DIVIDER);
|
||||
host->mode_bits = SPI_CPHA | SPI_CPOL;
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->bus_num = -1;
|
||||
host->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
|
||||
host->transfer_one = npcm_pspi_transfer_one;
|
||||
|
|
|
|||
|
|
@ -1383,8 +1383,6 @@ static int nxp_fspi_probe(struct platform_device *pdev)
|
|||
else
|
||||
ctlr->mem_caps = &nxp_fspi_mem_caps;
|
||||
|
||||
device_set_node(&ctlr->dev, fwnode);
|
||||
|
||||
ret = devm_add_action_or_reset(dev, nxp_fspi_cleanup, f);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -1290,7 +1290,6 @@ static int nxp_xspi_probe(struct platform_device *pdev)
|
|||
ctlr->num_chipselect = NXP_XSPI_MAX_CHIPSELECT;
|
||||
ctlr->mem_ops = &nxp_xspi_mem_ops;
|
||||
ctlr->mem_caps = &nxp_xspi_mem_caps;
|
||||
ctlr->dev.of_node = dev->of_node;
|
||||
|
||||
return devm_spi_register_controller(dev, ctlr);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -192,7 +192,6 @@ static int tiny_spi_of_probe(struct platform_device *pdev)
|
|||
|
||||
if (!np)
|
||||
return 0;
|
||||
hw->bitbang.ctlr->dev.of_node = pdev->dev.of_node;
|
||||
if (!of_property_read_u32(np, "clock-frequency", &val))
|
||||
hw->freq = val;
|
||||
if (!of_property_read_u32(np, "baud-width", &val))
|
||||
|
|
|
|||
|
|
@ -780,7 +780,6 @@ static int orion_spi_probe(struct platform_device *pdev)
|
|||
if (status < 0)
|
||||
goto out_rel_pm;
|
||||
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
status = spi_register_controller(host);
|
||||
if (status < 0)
|
||||
goto out_rel_pm;
|
||||
|
|
|
|||
|
|
@ -1893,7 +1893,6 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id)
|
|||
host->handle_err = pl022_handle_err;
|
||||
host->unprepare_transfer_hardware = pl022_unprepare_transfer_hardware;
|
||||
host->rt = platform_info->rt;
|
||||
host->dev.of_node = dev->of_node;
|
||||
host->use_gpio_descriptors = true;
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1290,8 +1290,6 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_device *ssp,
|
|||
drv_data->controller_info = platform_info;
|
||||
drv_data->ssp = ssp;
|
||||
|
||||
device_set_node(&controller->dev, dev_fwnode(dev));
|
||||
|
||||
/* The spi->mode bits understood by this driver: */
|
||||
controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
|
||||
|
||||
|
|
|
|||
|
|
@ -763,7 +763,6 @@ static int qcom_qspi_probe(struct platform_device *pdev)
|
|||
host->dma_alignment = QSPI_ALIGN_REQ;
|
||||
host->num_chipselect = QSPI_NUM_CS;
|
||||
host->bus_num = -1;
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->mode_bits = SPI_MODE_0 |
|
||||
SPI_TX_DUAL | SPI_RX_DUAL |
|
||||
SPI_TX_QUAD | SPI_RX_QUAD;
|
||||
|
|
|
|||
|
|
@ -1583,7 +1583,6 @@ static int qcom_spi_probe(struct platform_device *pdev)
|
|||
ctlr->num_chipselect = QPIC_QSPI_NUM_CS;
|
||||
ctlr->mem_ops = &qcom_spi_mem_ops;
|
||||
ctlr->mem_caps = &qcom_spi_mem_caps;
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
ctlr->mode_bits = SPI_TX_DUAL | SPI_RX_DUAL |
|
||||
SPI_TX_QUAD | SPI_RX_QUAD;
|
||||
|
||||
|
|
|
|||
|
|
@ -1091,7 +1091,6 @@ static int spi_qup_probe(struct platform_device *pdev)
|
|||
host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
|
||||
host->max_speed_hz = max_freq;
|
||||
host->transfer_one = spi_qup_transfer_one;
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->auto_runtime_pm = true;
|
||||
host->dma_alignment = dma_get_cache_alignment();
|
||||
host->max_dma_len = SPI_MAX_XFER;
|
||||
|
|
|
|||
|
|
@ -160,7 +160,6 @@ static int rb4xx_spi_probe(struct platform_device *pdev)
|
|||
if (IS_ERR(ahb_clk))
|
||||
return PTR_ERR(ahb_clk);
|
||||
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->bus_num = 0;
|
||||
host->num_chipselect = 3;
|
||||
host->mode_bits = SPI_TX_DUAL;
|
||||
|
|
|
|||
|
|
@ -400,7 +400,6 @@ static int rtl_snand_probe(struct platform_device *pdev)
|
|||
ctrl->mem_ops = &rtl_snand_mem_ops;
|
||||
ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
ctrl->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_DUAL | SPI_TX_QUAD;
|
||||
device_set_node(&ctrl->dev, dev_fwnode(dev));
|
||||
|
||||
return devm_spi_register_controller(dev, ctrl);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -169,7 +169,6 @@ static int realtek_rtl_spi_probe(struct platform_device *pdev)
|
|||
|
||||
init_hw(rtspi);
|
||||
|
||||
ctrl->dev.of_node = pdev->dev.of_node;
|
||||
ctrl->flags = SPI_CONTROLLER_HALF_DUPLEX;
|
||||
ctrl->set_cs = rt_set_cs;
|
||||
ctrl->transfer_one = transfer_one;
|
||||
|
|
|
|||
|
|
@ -622,7 +622,6 @@ static int rockchip_sfc_probe(struct platform_device *pdev)
|
|||
host->flags = SPI_CONTROLLER_HALF_DUPLEX;
|
||||
host->mem_ops = &rockchip_sfc_mem_ops;
|
||||
host->mem_caps = &rockchip_sfc_mem_caps;
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->mode_bits = SPI_TX_QUAD | SPI_TX_DUAL | SPI_RX_QUAD | SPI_RX_DUAL;
|
||||
host->max_speed_hz = SFC_MAX_SPEED;
|
||||
host->num_chipselect = SFC_MAX_CHIPSELECT_NUM;
|
||||
|
|
|
|||
|
|
@ -858,7 +858,6 @@ static int rockchip_spi_probe(struct platform_device *pdev)
|
|||
ctlr->num_chipselect = num_cs;
|
||||
ctlr->use_gpio_descriptors = true;
|
||||
}
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
ctlr->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4);
|
||||
ctlr->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX;
|
||||
ctlr->max_speed_hz = min(rs->freq / BAUDR_SCKDV_MIN, MAX_SCLK_OUT);
|
||||
|
|
|
|||
|
|
@ -1338,7 +1338,6 @@ static int rspi_probe(struct platform_device *pdev)
|
|||
ctlr->min_speed_hz = DIV_ROUND_UP(clksrc, ops->max_div);
|
||||
ctlr->max_speed_hz = DIV_ROUND_UP(clksrc, ops->min_div);
|
||||
ctlr->flags = ops->flags;
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
ctlr->use_gpio_descriptors = true;
|
||||
ctlr->max_native_cs = rspi->ops->num_hw_ss;
|
||||
|
||||
|
|
|
|||
|
|
@ -797,8 +797,6 @@ static int rzv2h_rspi_probe(struct platform_device *pdev)
|
|||
controller->dma_rx = NULL;
|
||||
}
|
||||
|
||||
device_set_node(&controller->dev, dev_fwnode(dev));
|
||||
|
||||
ret = devm_spi_register_controller(dev, controller);
|
||||
if (ret)
|
||||
dev_err(dev, "register controller failed\n");
|
||||
|
|
|
|||
|
|
@ -634,8 +634,6 @@ static int rzv2m_csi_probe(struct platform_device *pdev)
|
|||
controller->use_gpio_descriptors = true;
|
||||
controller->target_abort = rzv2m_csi_target_abort;
|
||||
|
||||
device_set_node(&controller->dev, dev_fwnode(dev));
|
||||
|
||||
ret = devm_request_irq(dev, irq, rzv2m_csi_irq_handler, 0,
|
||||
dev_name(dev), csi);
|
||||
if (ret)
|
||||
|
|
|
|||
|
|
@ -1295,7 +1295,6 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
|
|||
sdd->tx_dma.direction = DMA_MEM_TO_DEV;
|
||||
sdd->rx_dma.direction = DMA_DEV_TO_MEM;
|
||||
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->bus_num = -1;
|
||||
host->setup = s3c64xx_spi_setup;
|
||||
host->cleanup = s3c64xx_spi_cleanup;
|
||||
|
|
|
|||
|
|
@ -251,8 +251,6 @@ static int sc18is602_probe(struct i2c_client *client)
|
|||
if (!host)
|
||||
return -ENOMEM;
|
||||
|
||||
device_set_node(&host->dev, dev_fwnode(dev));
|
||||
|
||||
hw = spi_controller_get_devdata(host);
|
||||
|
||||
/* assert reset and then release */
|
||||
|
|
|
|||
|
|
@ -455,7 +455,6 @@ static int sg2044_spifmc_probe(struct platform_device *pdev)
|
|||
return PTR_ERR(spifmc->io_base);
|
||||
|
||||
ctrl->num_chipselect = 1;
|
||||
ctrl->dev.of_node = pdev->dev.of_node;
|
||||
ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
ctrl->auto_runtime_pm = false;
|
||||
ctrl->mem_ops = &sg2044_spifmc_mem_ops;
|
||||
|
|
|
|||
|
|
@ -253,7 +253,6 @@ static int hspi_probe(struct platform_device *pdev)
|
|||
|
||||
ctlr->bus_num = pdev->id;
|
||||
ctlr->mode_bits = SPI_CPOL | SPI_CPHA;
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
ctlr->auto_runtime_pm = true;
|
||||
ctlr->transfer_one_message = hspi_transfer_one_message;
|
||||
ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
|
|
|
|||
|
|
@ -1276,7 +1276,6 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
|
|||
ctlr->flags = chipdata->ctlr_flags;
|
||||
ctlr->bus_num = pdev->id;
|
||||
ctlr->num_chipselect = p->info->num_chipselect;
|
||||
ctlr->dev.of_node = dev->of_node;
|
||||
ctlr->setup = sh_msiof_spi_setup;
|
||||
ctlr->prepare_message = sh_msiof_prepare_message;
|
||||
ctlr->target_abort = sh_msiof_target_abort;
|
||||
|
|
|
|||
|
|
@ -368,7 +368,6 @@ static int sifive_spi_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
/* Define our host */
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->bus_num = pdev->id;
|
||||
host->num_chipselect = num_cs;
|
||||
host->mode_bits = SPI_CPHA | SPI_CPOL
|
||||
|
|
|
|||
|
|
@ -395,7 +395,6 @@ static int mtk_spi_slave_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
ctlr->auto_runtime_pm = true;
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
ctlr->mode_bits = SPI_CPOL | SPI_CPHA;
|
||||
ctlr->mode_bits |= SPI_LSB_FIRST;
|
||||
|
||||
|
|
|
|||
|
|
@ -628,7 +628,6 @@ static int f_ospi_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
}
|
||||
ctlr->num_chipselect = num_cs;
|
||||
ctlr->dev.of_node = dev->of_node;
|
||||
|
||||
ospi = spi_controller_get_devdata(ctlr);
|
||||
ospi->dev = dev;
|
||||
|
|
|
|||
|
|
@ -571,7 +571,6 @@ static int sprd_adi_probe(struct platform_device *pdev)
|
|||
if (sadi->data->wdg_rst)
|
||||
sadi->data->wdg_rst(sadi);
|
||||
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
ctlr->bus_num = pdev->id;
|
||||
ctlr->num_chipselect = num_chipselect;
|
||||
ctlr->flags = SPI_CONTROLLER_HALF_DUPLEX;
|
||||
|
|
|
|||
|
|
@ -936,7 +936,6 @@ static int sprd_spi_probe(struct platform_device *pdev)
|
|||
|
||||
ss->phy_base = res->start;
|
||||
ss->dev = &pdev->dev;
|
||||
sctlr->dev.of_node = pdev->dev.of_node;
|
||||
sctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE | SPI_TX_DUAL;
|
||||
sctlr->bus_num = pdev->id;
|
||||
sctlr->set_cs = sprd_spi_chipselect;
|
||||
|
|
|
|||
|
|
@ -942,7 +942,6 @@ static int stm32_ospi_probe(struct platform_device *pdev)
|
|||
ctrl->use_gpio_descriptors = true;
|
||||
ctrl->transfer_one_message = stm32_ospi_transfer_one_message;
|
||||
ctrl->num_chipselect = STM32_OSPI_MAX_NORCHIP;
|
||||
ctrl->dev.of_node = dev->of_node;
|
||||
|
||||
pm_runtime_enable(ospi->dev);
|
||||
pm_runtime_set_autosuspend_delay(ospi->dev, STM32_AUTOSUSPEND_DELAY);
|
||||
|
|
|
|||
|
|
@ -860,7 +860,6 @@ static int stm32_qspi_probe(struct platform_device *pdev)
|
|||
ctrl->use_gpio_descriptors = true;
|
||||
ctrl->transfer_one_message = stm32_qspi_transfer_one_message;
|
||||
ctrl->num_chipselect = STM32_QSPI_MAX_NORCHIP;
|
||||
ctrl->dev.of_node = dev->of_node;
|
||||
|
||||
pm_runtime_set_autosuspend_delay(dev, STM32_AUTOSUSPEND_DELAY);
|
||||
pm_runtime_use_autosuspend(dev);
|
||||
|
|
|
|||
|
|
@ -2464,7 +2464,6 @@ static int stm32_spi_probe(struct platform_device *pdev)
|
|||
goto err_clk_disable;
|
||||
}
|
||||
|
||||
ctrl->dev.of_node = pdev->dev.of_node;
|
||||
ctrl->auto_runtime_pm = true;
|
||||
ctrl->bus_num = pdev->id;
|
||||
ctrl->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LSB_FIRST |
|
||||
|
|
|
|||
|
|
@ -471,7 +471,6 @@ static int sun4i_spi_probe(struct platform_device *pdev)
|
|||
host->num_chipselect = 4;
|
||||
host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
|
||||
host->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->auto_runtime_pm = true;
|
||||
host->max_transfer_size = sun4i_spi_max_transfer_size;
|
||||
|
||||
|
|
|
|||
|
|
@ -673,7 +673,6 @@ static int sun6i_spi_probe(struct platform_device *pdev)
|
|||
host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST |
|
||||
sspi->cfg->mode_bits;
|
||||
host->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->auto_runtime_pm = true;
|
||||
host->max_transfer_size = sun6i_spi_max_transfer_size;
|
||||
|
||||
|
|
|
|||
|
|
@ -419,7 +419,6 @@ static int sp7021_spi_controller_probe(struct platform_device *pdev)
|
|||
ctlr = devm_spi_alloc_host(dev, sizeof(*pspim));
|
||||
if (!ctlr)
|
||||
return -ENOMEM;
|
||||
device_set_node(&ctlr->dev, dev_fwnode(dev));
|
||||
ctlr->bus_num = pdev->id;
|
||||
ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
|
||||
ctlr->auto_runtime_pm = true;
|
||||
|
|
|
|||
|
|
@ -600,7 +600,6 @@ static irqreturn_t sq_spi_tx_handler(int irq, void *priv)
|
|||
|
||||
static int synquacer_spi_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct spi_controller *host;
|
||||
struct synquacer_spi *sspi;
|
||||
int ret;
|
||||
|
|
@ -699,8 +698,6 @@ static int synquacer_spi_probe(struct platform_device *pdev)
|
|||
goto disable_clk;
|
||||
}
|
||||
|
||||
host->dev.of_node = np;
|
||||
host->dev.fwnode = pdev->dev.fwnode;
|
||||
host->auto_runtime_pm = true;
|
||||
host->bus_num = pdev->id;
|
||||
|
||||
|
|
|
|||
|
|
@ -1412,7 +1412,6 @@ static int tegra_spi_probe(struct platform_device *pdev)
|
|||
goto exit_pm_disable;
|
||||
}
|
||||
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
ret = devm_spi_register_controller(&pdev->dev, host);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "can not register to host err %d\n", ret);
|
||||
|
|
|
|||
|
|
@ -505,7 +505,6 @@ static int tegra_sflash_probe(struct platform_device *pdev)
|
|||
tegra_sflash_writel(tsd, tsd->def_command_reg, SPI_COMMAND);
|
||||
pm_runtime_put(&pdev->dev);
|
||||
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
ret = devm_spi_register_controller(&pdev->dev, host);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "can not register to host err %d\n", ret);
|
||||
|
|
|
|||
|
|
@ -1103,7 +1103,6 @@ static int tegra_slink_probe(struct platform_device *pdev)
|
|||
tegra_slink_writel(tspi, tspi->def_command_reg, SLINK_COMMAND);
|
||||
tegra_slink_writel(tspi, tspi->def_command2_reg, SLINK_COMMAND2);
|
||||
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
ret = spi_register_controller(host);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "can not register to host err %d\n", ret);
|
||||
|
|
|
|||
|
|
@ -1743,7 +1743,6 @@ static int tegra_qspi_probe(struct platform_device *pdev)
|
|||
goto exit_pm_disable;
|
||||
}
|
||||
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
ret = spi_register_controller(host);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "failed to register host: %d\n", ret);
|
||||
|
|
|
|||
|
|
@ -775,7 +775,6 @@ static int ti_qspi_probe(struct platform_device *pdev)
|
|||
host->setup = ti_qspi_setup;
|
||||
host->auto_runtime_pm = true;
|
||||
host->transfer_one_message = ti_qspi_start_transfer_one;
|
||||
host->dev.of_node = pdev->dev.of_node;
|
||||
host->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) |
|
||||
SPI_BPW_MASK(8);
|
||||
host->mem_ops = &ti_qspi_mem_ops;
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue