perf vendor events arm64: Remove uncountable events

These events are never countable by the PMU and are only intended to
be used as external inputs to trace. Therefore showing them in 'perf
list' is misleading so remove them.

The generator script doesn't emit these events when used with the new
telemetry-solution input files [1].

'perf list' should only show countable events because there are events
that are sometimes implemented, sometimes countable and sometimes not,
for example TRB_TRIG. If we always include any implemented events
whether they are countable or not then it's not possible to tell whether
they are usable in perf without going to the docs, defeating the point
of 'perf list'.

It's also not useful yet to display implemented events that are not
countable (for help in using trace rather than perf stat), because
PMU_OVFS and PMU_HOVFS are practically always implemented and TRB_TRIG
is always implemented when there is TRBE.

[1]: https://gitlab.arm.com/telemetry-solution/telemetry-solution/-/tree/main/data/pmu/cpu

Reviewed-by: Ian Rogers <irogers@google.com>
Signed-off-by: James Clark <james.clark@linaro.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Akio Kakuno <fj3333bs@aa.jp.fujitsu.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: Yoshihiro Furudera <fj5100bi@fujitsu.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
James Clark 2025-12-31 12:12:28 +00:00 committed by Arnaldo Carvalho de Melo
parent d1f9dc6723
commit a66f6242fb
3 changed files with 0 additions and 30 deletions

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@ -1,8 +0,0 @@
[
{
"ArchStdEvent": "PMU_OVFS"
},
{
"ArchStdEvent": "PMU_HOVFS"
}
]

View File

@ -432,24 +432,12 @@
"EventName": "TRB_WRAP",
"BriefDescription": "Trace buffer current write pointer wrapped"
},
{
"PublicDescription": "PMU overflow, counters accessible to EL1 and EL0",
"EventCode": "0x400D",
"EventName": "PMU_OVFS",
"BriefDescription": "PMU overflow, counters accessible to EL1 and EL0"
},
{
"PublicDescription": "Trace buffer Trigger Event",
"EventCode": "0x400E",
"EventName": "TRB_TRIG",
"BriefDescription": "Trace buffer Trigger Event"
},
{
"PublicDescription": "PMU overflow, counters reserved for use by EL2",
"EventCode": "0x400F",
"EventName": "PMU_HOVFS",
"BriefDescription": "PMU overflow, counters reserved for use by EL2"
},
{
"PublicDescription": "PE Trace Unit external output 0",
"EventCode": "0x4010",

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@ -1,10 +0,0 @@
[
{
"ArchStdEvent": "PMU_OVFS",
"BriefDescription": "This event counts the event generated each time one of the condition occurs described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
},
{
"ArchStdEvent": "PMU_HOVFS",
"BriefDescription": "This event counts the event generated each time an event is counted by an event counter <n> and all of the condition occur described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
}
]