From 390c01073f5d0bd64db37926ddb232f33b83620d Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 23 Apr 2025 22:37:04 +0800 Subject: [PATCH 1/3] soc: imx8m: Cleanup with adding imx8m_soc_[un]prepare There is a common flow to i.MX8M family, map OCOTP register base and enable ocotp clk first before read Unique ID from OCOTP. So introduce imx8m_soc_prepare to do ioremap and enable the ocotp clk, and introduce imx8m_soc_unprepare to disable the clk and do iounmap. With this patch, no need to spread the ioremap and clk handling in each soc_revision hook. Signed-off-by: Peng Fan Reviewed-by: Marco Felsch Signed-off-by: Shawn Guo --- drivers/soc/imx/soc-imx8m.c | 133 +++++++++++++++++++----------------- 1 file changed, 72 insertions(+), 61 deletions(-) diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c index 3ed8161d7d28..c4879947dd2d 100644 --- a/drivers/soc/imx/soc-imx8m.c +++ b/drivers/soc/imx/soc-imx8m.c @@ -30,7 +30,13 @@ struct imx8_soc_data { char *name; - int (*soc_revision)(u32 *socrev, u64 *socuid); + const char *ocotp_compatible; + int (*soc_revision)(struct platform_device *pdev, u32 *socrev, u64 *socuid); +}; + +struct imx8_soc_drvdata { + void __iomem *ocotp_base; + struct clk *clk; }; #ifdef CONFIG_HAVE_ARM_SMCCC @@ -49,30 +55,12 @@ static u32 imx8mq_soc_revision_from_atf(void) static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; }; #endif -static int imx8mq_soc_revision(u32 *socrev, u64 *socuid) +static int imx8mq_soc_revision(struct platform_device *pdev, u32 *socrev, u64 *socuid) { - struct device_node *np __free(device_node) = - of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp"); - void __iomem *ocotp_base; + struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev); + void __iomem *ocotp_base = drvdata->ocotp_base; u32 magic; u32 rev; - struct clk *clk; - int ret; - - if (!np) - return -EINVAL; - - ocotp_base = of_iomap(np, 0); - if (!ocotp_base) - return -EINVAL; - - clk = of_clk_get_by_name(np, NULL); - if (IS_ERR(clk)) { - ret = PTR_ERR(clk); - goto err_clk; - } - - clk_prepare_enable(clk); /* * SOC revision on older imx8mq is not available in fuses so query @@ -91,55 +79,24 @@ static int imx8mq_soc_revision(u32 *socrev, u64 *socuid) *socrev = rev; - clk_disable_unprepare(clk); - clk_put(clk); - iounmap(ocotp_base); - return 0; - -err_clk: - iounmap(ocotp_base); - return ret; } -static int imx8mm_soc_uid(u64 *socuid) +static int imx8mm_soc_uid(struct platform_device *pdev, u64 *socuid) { - struct device_node *np __free(device_node) = - of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp"); - void __iomem *ocotp_base; - struct clk *clk; - int ret = 0; + struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev); + void __iomem *ocotp_base = drvdata->ocotp_base; u32 offset = of_machine_is_compatible("fsl,imx8mp") ? IMX8MP_OCOTP_UID_OFFSET : 0; - if (!np) - return -EINVAL; - - ocotp_base = of_iomap(np, 0); - if (!ocotp_base) - return -EINVAL; - - clk = of_clk_get_by_name(np, NULL); - if (IS_ERR(clk)) { - ret = PTR_ERR(clk); - goto err_clk; - } - - clk_prepare_enable(clk); - *socuid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset); *socuid <<= 32; *socuid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset); - clk_disable_unprepare(clk); - clk_put(clk); - -err_clk: - iounmap(ocotp_base); - return ret; + return 0; } -static int imx8mm_soc_revision(u32 *socrev, u64 *socuid) +static int imx8mm_soc_revision(struct platform_device *pdev, u32 *socrev, u64 *socuid) { struct device_node *np __free(device_node) = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop"); @@ -156,26 +113,66 @@ static int imx8mm_soc_revision(u32 *socrev, u64 *socuid) iounmap(anatop_base); - return imx8mm_soc_uid(socuid); + return imx8mm_soc_uid(pdev, socuid); +} + +static int imx8m_soc_prepare(struct platform_device *pdev, const char *ocotp_compatible) +{ + struct device_node *np __free(device_node) = + of_find_compatible_node(NULL, NULL, ocotp_compatible); + struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev); + int ret = 0; + + if (!np) + return -EINVAL; + + drvdata->ocotp_base = of_iomap(np, 0); + if (!drvdata->ocotp_base) + return -EINVAL; + + drvdata->clk = of_clk_get_by_name(np, NULL); + if (IS_ERR(drvdata->clk)) { + ret = PTR_ERR(drvdata->clk); + goto err_clk; + } + + return clk_prepare_enable(drvdata->clk); + +err_clk: + iounmap(drvdata->ocotp_base); + return ret; +} + +static void imx8m_soc_unprepare(struct platform_device *pdev) +{ + struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev); + + clk_disable_unprepare(drvdata->clk); + clk_put(drvdata->clk); + iounmap(drvdata->ocotp_base); } static const struct imx8_soc_data imx8mq_soc_data = { .name = "i.MX8MQ", + .ocotp_compatible = "fsl,imx8mq-ocotp", .soc_revision = imx8mq_soc_revision, }; static const struct imx8_soc_data imx8mm_soc_data = { .name = "i.MX8MM", + .ocotp_compatible = "fsl,imx8mm-ocotp", .soc_revision = imx8mm_soc_revision, }; static const struct imx8_soc_data imx8mn_soc_data = { .name = "i.MX8MN", + .ocotp_compatible = "fsl,imx8mm-ocotp", .soc_revision = imx8mm_soc_revision, }; static const struct imx8_soc_data imx8mp_soc_data = { .name = "i.MX8MP", + .ocotp_compatible = "fsl,imx8mm-ocotp", .soc_revision = imx8mm_soc_revision, }; @@ -207,6 +204,7 @@ static int imx8m_soc_probe(struct platform_device *pdev) struct soc_device_attribute *soc_dev_attr; struct platform_device *cpufreq_dev; const struct imx8_soc_data *data; + struct imx8_soc_drvdata *drvdata; struct device *dev = &pdev->dev; const struct of_device_id *id; struct soc_device *soc_dev; @@ -218,6 +216,12 @@ static int imx8m_soc_probe(struct platform_device *pdev) if (!soc_dev_attr) return -ENOMEM; + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + platform_set_drvdata(pdev, drvdata); + soc_dev_attr->family = "Freescale i.MX"; ret = of_property_read_string(of_root, "model", &soc_dev_attr->machine); @@ -231,11 +235,18 @@ static int imx8m_soc_probe(struct platform_device *pdev) data = id->data; if (data) { soc_dev_attr->soc_id = data->name; + ret = imx8m_soc_prepare(pdev, data->ocotp_compatible); + if (ret) + return ret; + if (data->soc_revision) { - ret = data->soc_revision(&soc_rev, &soc_uid); - if (ret) + ret = data->soc_revision(pdev, &soc_rev, &soc_uid); + if (ret) { + imx8m_soc_unprepare(pdev); return ret; + } } + imx8m_soc_unprepare(pdev); } soc_dev_attr->revision = imx8_revision(dev, soc_rev); From 698105013949ec3f47286bd67f71c65597e02393 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 23 Apr 2025 22:37:05 +0800 Subject: [PATCH 2/3] soc: imx8m: Introduce soc_uid hook Cleanup code by introducing soc_uid hook, i.MX8MQ/M/N could reuse one function imx8m_soc_uid, i.MX8MP could have its own one. With this patch, it will easy to add 128bits UID support for i.MX8MP. Signed-off-by: Peng Fan Reviewed-by: Marco Felsch Signed-off-by: Shawn Guo --- drivers/soc/imx/soc-imx8m.c | 46 ++++++++++++++++++++++++++----------- 1 file changed, 32 insertions(+), 14 deletions(-) diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c index c4879947dd2d..2186f6ab3edd 100644 --- a/drivers/soc/imx/soc-imx8m.c +++ b/drivers/soc/imx/soc-imx8m.c @@ -31,7 +31,8 @@ struct imx8_soc_data { char *name; const char *ocotp_compatible; - int (*soc_revision)(struct platform_device *pdev, u32 *socrev, u64 *socuid); + int (*soc_revision)(struct platform_device *pdev, u32 *socrev); + int (*soc_uid)(struct platform_device *pdev, u64 *socuid); }; struct imx8_soc_drvdata { @@ -55,7 +56,19 @@ static u32 imx8mq_soc_revision_from_atf(void) static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; }; #endif -static int imx8mq_soc_revision(struct platform_device *pdev, u32 *socrev, u64 *socuid) +static int imx8m_soc_uid(struct platform_device *pdev, u64 *socuid) +{ + struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev); + void __iomem *ocotp_base = drvdata->ocotp_base; + + *socuid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH); + *socuid <<= 32; + *socuid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW); + + return 0; +} + +static int imx8mq_soc_revision(struct platform_device *pdev, u32 *socrev) { struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev); void __iomem *ocotp_base = drvdata->ocotp_base; @@ -73,30 +86,24 @@ static int imx8mq_soc_revision(struct platform_device *pdev, u32 *socrev, u64 *s rev = REV_B1; } - *socuid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH); - *socuid <<= 32; - *socuid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW); - *socrev = rev; return 0; } -static int imx8mm_soc_uid(struct platform_device *pdev, u64 *socuid) +static int imx8mp_soc_uid(struct platform_device *pdev, u64 *socuid) { struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev); void __iomem *ocotp_base = drvdata->ocotp_base; - u32 offset = of_machine_is_compatible("fsl,imx8mp") ? - IMX8MP_OCOTP_UID_OFFSET : 0; - *socuid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset); + *socuid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + IMX8MP_OCOTP_UID_OFFSET); *socuid <<= 32; - *socuid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset); + *socuid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + IMX8MP_OCOTP_UID_OFFSET); return 0; } -static int imx8mm_soc_revision(struct platform_device *pdev, u32 *socrev, u64 *socuid) +static int imx8mm_soc_revision(struct platform_device *pdev, u32 *socrev) { struct device_node *np __free(device_node) = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop"); @@ -113,7 +120,7 @@ static int imx8mm_soc_revision(struct platform_device *pdev, u32 *socrev, u64 *s iounmap(anatop_base); - return imx8mm_soc_uid(pdev, socuid); + return 0; } static int imx8m_soc_prepare(struct platform_device *pdev, const char *ocotp_compatible) @@ -156,24 +163,28 @@ static const struct imx8_soc_data imx8mq_soc_data = { .name = "i.MX8MQ", .ocotp_compatible = "fsl,imx8mq-ocotp", .soc_revision = imx8mq_soc_revision, + .soc_uid = imx8m_soc_uid, }; static const struct imx8_soc_data imx8mm_soc_data = { .name = "i.MX8MM", .ocotp_compatible = "fsl,imx8mm-ocotp", .soc_revision = imx8mm_soc_revision, + .soc_uid = imx8m_soc_uid, }; static const struct imx8_soc_data imx8mn_soc_data = { .name = "i.MX8MN", .ocotp_compatible = "fsl,imx8mm-ocotp", .soc_revision = imx8mm_soc_revision, + .soc_uid = imx8m_soc_uid, }; static const struct imx8_soc_data imx8mp_soc_data = { .name = "i.MX8MP", .ocotp_compatible = "fsl,imx8mm-ocotp", .soc_revision = imx8mm_soc_revision, + .soc_uid = imx8mp_soc_uid, }; static __maybe_unused const struct of_device_id imx8_soc_match[] = { @@ -240,7 +251,14 @@ static int imx8m_soc_probe(struct platform_device *pdev) return ret; if (data->soc_revision) { - ret = data->soc_revision(pdev, &soc_rev, &soc_uid); + ret = data->soc_revision(pdev, &soc_rev); + if (ret) { + imx8m_soc_unprepare(pdev); + return ret; + } + } + if (data->soc_uid) { + ret = data->soc_uid(pdev, &soc_uid); if (ret) { imx8m_soc_unprepare(pdev); return ret; From fd0bf2bb32215976c269d6e68c1a12b5815e6c20 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 23 Apr 2025 22:37:06 +0800 Subject: [PATCH 3/3] soc: imx8m: Dump higher 64bits UID i.MX8MP UID is actually 128bits and partitioned into two parts. The 1st 64bits are at 0x410 and 0x420, and 2nd 64bits are at 0xE00 and 0xE10. Dump the whole 128bits for i.MX8MP, by set soc_uid as an array with two u64. Signed-off-by: Peng Fan Reviewed-by: Marco Felsch Signed-off-by: Shawn Guo --- drivers/soc/imx/soc-imx8m.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c index 2186f6ab3edd..04a1b60f2f2b 100644 --- a/drivers/soc/imx/soc-imx8m.c +++ b/drivers/soc/imx/soc-imx8m.c @@ -24,6 +24,7 @@ #define OCOTP_UID_HIGH 0x420 #define IMX8MP_OCOTP_UID_OFFSET 0x10 +#define IMX8MP_OCOTP_UID_HIGH 0xE00 /* Same as ANADIG_DIGPROG_IMX7D */ #define ANADIG_DIGPROG_IMX8MM 0x800 @@ -96,9 +97,13 @@ static int imx8mp_soc_uid(struct platform_device *pdev, u64 *socuid) struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev); void __iomem *ocotp_base = drvdata->ocotp_base; - *socuid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + IMX8MP_OCOTP_UID_OFFSET); - *socuid <<= 32; - *socuid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + IMX8MP_OCOTP_UID_OFFSET); + socuid[0] = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + IMX8MP_OCOTP_UID_OFFSET); + socuid[0] <<= 32; + socuid[0] |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + IMX8MP_OCOTP_UID_OFFSET); + + socuid[1] = readl_relaxed(ocotp_base + IMX8MP_OCOTP_UID_HIGH + 0x10); + socuid[1] <<= 32; + socuid[1] |= readl_relaxed(ocotp_base + IMX8MP_OCOTP_UID_HIGH); return 0; } @@ -220,7 +225,7 @@ static int imx8m_soc_probe(struct platform_device *pdev) const struct of_device_id *id; struct soc_device *soc_dev; u32 soc_rev = 0; - u64 soc_uid = 0; + u64 soc_uid[2] = {0, 0}; int ret; soc_dev_attr = devm_kzalloc(dev, sizeof(*soc_dev_attr), GFP_KERNEL); @@ -258,7 +263,7 @@ static int imx8m_soc_probe(struct platform_device *pdev) } } if (data->soc_uid) { - ret = data->soc_uid(pdev, &soc_uid); + ret = data->soc_uid(pdev, soc_uid); if (ret) { imx8m_soc_unprepare(pdev); return ret; @@ -271,7 +276,12 @@ static int imx8m_soc_probe(struct platform_device *pdev) if (!soc_dev_attr->revision) return -ENOMEM; - soc_dev_attr->serial_number = devm_kasprintf(dev, GFP_KERNEL, "%016llX", soc_uid); + if (soc_uid[1]) + soc_dev_attr->serial_number = devm_kasprintf(dev, GFP_KERNEL, "%016llX%016llX", + soc_uid[1], soc_uid[0]); + else + soc_dev_attr->serial_number = devm_kasprintf(dev, GFP_KERNEL, "%016llX", + soc_uid[0]); if (!soc_dev_attr->serial_number) return -ENOMEM;