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pinctrl: sunxi: Add support for the secondary A523 GPIO ports 

As most other Allwinner SoCs before, the A523 chip contains a second
GPIO controller, managing banks PL and PM.
Use the newly introduced DT based pinctrl driver to describe just the
generic pinctrl properties, so advertise the number of pins per bank
and the interrupt capabilities. The actual function/mux assignment is
taken from the devicetree.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/20250306235827.4895-9-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Andre Przywara 2025-03-06 23:58:27 +00:00 committed by Linus Walleij
parent 648be4cd95
commit b8a51e95b3
3 changed files with 60 additions and 0 deletions
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5
drivers/pinctrl/sunxi/Kconfig
View File

@ -136,4 +136,9 @@ config PINCTRL_SUN55I_A523
default ARM64 && ARCH_SUNXI
select PINCTRL_SUNXI
config PINCTRL_SUN55I_A523_R
bool "Support for the Allwinner A523 R-PIO"
default ARM64 && ARCH_SUNXI
select PINCTRL_SUNXI
endif

1
drivers/pinctrl/sunxi/Makefile
View File

@ -28,5 +28,6 @@ obj-$(CONFIG_PINCTRL_SUN50I_H6_R) += pinctrl-sun50i-h6-r.o
obj-$(CONFIG_PINCTRL_SUN50I_H616) += pinctrl-sun50i-h616.o
obj-$(CONFIG_PINCTRL_SUN50I_H616_R) += pinctrl-sun50i-h616-r.o
obj-$(CONFIG_PINCTRL_SUN55I_A523) += pinctrl-sun55i-a523.o
obj-$(CONFIG_PINCTRL_SUN55I_A523_R) += pinctrl-sun55i-a523-r.o
obj-$(CONFIG_PINCTRL_SUN9I_A80) += pinctrl-sun9i-a80.o
obj-$(CONFIG_PINCTRL_SUN9I_A80_R) += pinctrl-sun9i-a80-r.o

54
drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c Normal file
View File

@ -0,0 +1,54 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Allwinner A523 SoC r-pinctrl driver.
*
* Copyright (C) 2024 Arm Ltd.
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinctrl.h>
#include "pinctrl-sunxi.h"
static const u8 a523_r_nr_bank_pins[SUNXI_PINCTRL_MAX_BANKS] =
/* PL PM */
{ 14, 6 };
static const unsigned int a523_r_irq_bank_map[] = { 0, 1 };
static const u8 a523_r_irq_bank_muxes[SUNXI_PINCTRL_MAX_BANKS] =
/* PL PM */
{ 14, 14 };
static struct sunxi_pinctrl_desc a523_r_pinctrl_data = {
.irq_banks = ARRAY_SIZE(a523_r_irq_bank_map),
.irq_bank_map = a523_r_irq_bank_map,
.irq_read_needs_mux = true,
.io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL,
.pin_base = PL_BASE,
};
static int a523_r_pinctrl_probe(struct platform_device *pdev)
{
return sunxi_pinctrl_dt_table_init(pdev, a523_r_nr_bank_pins,
a523_r_irq_bank_muxes,
&a523_r_pinctrl_data,
SUNXI_PINCTRL_NEW_REG_LAYOUT);
}
static const struct of_device_id a523_r_pinctrl_match[] = {
{ .compatible = "allwinner,sun55i-a523-r-pinctrl", },
{}
};
static struct platform_driver a523_r_pinctrl_driver = {
.probe = a523_r_pinctrl_probe,
.driver = {
.name = "sun55i-a523-r-pinctrl",
.of_match_table = a523_r_pinctrl_match,
},
};
builtin_platform_driver(a523_r_pinctrl_driver);