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Documentation: kvm: fix formatting of the quirks table 

A recently added quirk does not fit in the left column of the table,
so it all has to be reformatted and realigned.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2026-03-11 19:16:52 +01:00
parent 6b1ca262a9
commit dca01b0a26
1 changed files with 105 additions and 105 deletions
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210
Documentation/virt/kvm/api.rst
View File

@ -8435,123 +8435,123 @@ KVM_CHECK_EXTENSION.
The valid bits in cap.args[0] are: The valid bits in cap.args[0] are:
=================================== ============================================ ======================================== ================================================
KVM_X86_QUIRK_LINT0_REENABLED By default, the reset value for the LVT KVM_X86_QUIRK_LINT0_REENABLED By default, the reset value for the LVT
LINT0 register is 0x700 (APIC_MODE_EXTINT). LINT0 register is 0x700 (APIC_MODE_EXTINT).
When this quirk is disabled, the reset value When this quirk is disabled, the reset value
is 0x10000 (APIC_LVT_MASKED). is 0x10000 (APIC_LVT_MASKED).
KVM_X86_QUIRK_CD_NW_CLEARED By default, KVM clears CR0.CD and CR0.NW on KVM_X86_QUIRK_CD_NW_CLEARED By default, KVM clears CR0.CD and CR0.NW on
AMD CPUs to workaround buggy guest firmware AMD CPUs to workaround buggy guest firmware
that runs in perpetuity with CR0.CD, i.e. that runs in perpetuity with CR0.CD, i.e.
with caches in "no fill" mode. with caches in "no fill" mode.
When this quirk is disabled, KVM does not When this quirk is disabled, KVM does not
change the value of CR0.CD and CR0.NW. change the value of CR0.CD and CR0.NW.
KVM_X86_QUIRK_LAPIC_MMIO_HOLE By default, the MMIO LAPIC interface is KVM_X86_QUIRK_LAPIC_MMIO_HOLE By default, the MMIO LAPIC interface is
available even when configured for x2APIC available even when configured for x2APIC
mode. When this quirk is disabled, KVM mode. When this quirk is disabled, KVM
disables the MMIO LAPIC interface if the disables the MMIO LAPIC interface if the
LAPIC is in x2APIC mode. LAPIC is in x2APIC mode.
KVM_X86_QUIRK_OUT_7E_INC_RIP By default, KVM pre-increments %rip before KVM_X86_QUIRK_OUT_7E_INC_RIP By default, KVM pre-increments %rip before
exiting to userspace for an OUT instruction exiting to userspace for an OUT instruction
to port 0x7e. When this quirk is disabled, to port 0x7e. When this quirk is disabled,
KVM does not pre-increment %rip before KVM does not pre-increment %rip before
exiting to userspace. exiting to userspace.
KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT When this quirk is disabled, KVM sets KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT When this quirk is disabled, KVM sets
CPUID.01H:ECX[bit 3] (MONITOR/MWAIT) if CPUID.01H:ECX[bit 3] (MONITOR/MWAIT) if
IA32_MISC_ENABLE[bit 18] (MWAIT) is set. IA32_MISC_ENABLE[bit 18] (MWAIT) is set.
Additionally, when this quirk is disabled, Additionally, when this quirk is disabled,
KVM clears CPUID.01H:ECX[bit 3] if KVM clears CPUID.01H:ECX[bit 3] if
IA32_MISC_ENABLE[bit 18] is cleared. IA32_MISC_ENABLE[bit 18] is cleared.
KVM_X86_QUIRK_FIX_HYPERCALL_INSN By default, KVM rewrites guest KVM_X86_QUIRK_FIX_HYPERCALL_INSN By default, KVM rewrites guest
VMMCALL/VMCALL instructions to match the VMMCALL/VMCALL instructions to match the
vendor's hypercall instruction for the vendor's hypercall instruction for the
system. When this quirk is disabled, KVM system. When this quirk is disabled, KVM
will no longer rewrite invalid guest will no longer rewrite invalid guest
hypercall instructions. Executing the hypercall instructions. Executing the
incorrect hypercall instruction will incorrect hypercall instruction will
generate a #UD within the guest. generate a #UD within the guest.
KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS By default, KVM emulates MONITOR/MWAIT (if KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS By default, KVM emulates MONITOR/MWAIT (if
they are intercepted) as NOPs regardless of they are intercepted) as NOPs regardless of
whether or not MONITOR/MWAIT are supported whether or not MONITOR/MWAIT are supported
according to guest CPUID. When this quirk according to guest CPUID. When this quirk
is disabled and KVM_X86_DISABLE_EXITS_MWAIT is disabled and KVM_X86_DISABLE_EXITS_MWAIT
is not set (MONITOR/MWAIT are intercepted), is not set (MONITOR/MWAIT are intercepted),
KVM will inject a #UD on MONITOR/MWAIT if KVM will inject a #UD on MONITOR/MWAIT if
they're unsupported per guest CPUID. Note, they're unsupported per guest CPUID. Note,
KVM will modify MONITOR/MWAIT support in KVM will modify MONITOR/MWAIT support in
guest CPUID on writes to MISC_ENABLE if guest CPUID on writes to MISC_ENABLE if
KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT is KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT is
disabled. disabled.
KVM_X86_QUIRK_SLOT_ZAP_ALL By default, for KVM_X86_DEFAULT_VM VMs, KVM KVM_X86_QUIRK_SLOT_ZAP_ALL By default, for KVM_X86_DEFAULT_VM VMs, KVM
invalidates all SPTEs in all memslots and invalidates all SPTEs in all memslots and
address spaces when a memslot is deleted or address spaces when a memslot is deleted or
moved. When this quirk is disabled (or the moved. When this quirk is disabled (or the
VM type isn't KVM_X86_DEFAULT_VM), KVM only VM type isn't KVM_X86_DEFAULT_VM), KVM only
ensures the backing memory of the deleted ensures the backing memory of the deleted
or moved memslot isn't reachable, i.e KVM or moved memslot isn't reachable, i.e KVM
_may_ invalidate only SPTEs related to the _may_ invalidate only SPTEs related to the
memslot. memslot.
KVM_X86_QUIRK_STUFF_FEATURE_MSRS By default, at vCPU creation, KVM sets the KVM_X86_QUIRK_STUFF_FEATURE_MSRS By default, at vCPU creation, KVM sets the
vCPU's MSR_IA32_PERF_CAPABILITIES (0x345), vCPU's MSR_IA32_PERF_CAPABILITIES (0x345),
MSR_IA32_ARCH_CAPABILITIES (0x10a), MSR_IA32_ARCH_CAPABILITIES (0x10a),
MSR_PLATFORM_INFO (0xce), and all VMX MSRs MSR_PLATFORM_INFO (0xce), and all VMX MSRs
(0x480..0x492) to the maximal capabilities (0x480..0x492) to the maximal capabilities
supported by KVM. KVM also sets supported by KVM. KVM also sets
MSR_IA32_UCODE_REV (0x8b) to an arbitrary MSR_IA32_UCODE_REV (0x8b) to an arbitrary
value (which is different for Intel vs. value (which is different for Intel vs.
AMD). Lastly, when guest CPUID is set (by AMD). Lastly, when guest CPUID is set (by
userspace), KVM modifies select VMX MSR userspace), KVM modifies select VMX MSR
fields to force consistency between guest fields to force consistency between guest
CPUID and L2's effective ISA. When this CPUID and L2's effective ISA. When this
quirk is disabled, KVM zeroes the vCPU's MSR quirk is disabled, KVM zeroes the vCPU's MSR
values (with two exceptions, see below), values (with two exceptions, see below),
i.e. treats the feature MSRs like CPUID i.e. treats the feature MSRs like CPUID
leaves and gives userspace full control of leaves and gives userspace full control of
the vCPU model definition. This quirk does the vCPU model definition. This quirk does
not affect VMX MSRs CR0/CR4_FIXED1 (0x487 not affect VMX MSRs CR0/CR4_FIXED1 (0x487
and 0x489), as KVM does now allow them to and 0x489), as KVM does now allow them to
be set by userspace (KVM sets them based on be set by userspace (KVM sets them based on
guest CPUID, for safety purposes). guest CPUID, for safety purposes).
KVM_X86_QUIRK_IGNORE_GUEST_PAT By default, on Intel platforms, KVM ignores KVM_X86_QUIRK_IGNORE_GUEST_PAT By default, on Intel platforms, KVM ignores
guest PAT and forces the effective memory guest PAT and forces the effective memory
type to WB in EPT. The quirk is not available type to WB in EPT. The quirk is not available
on Intel platforms which are incapable of on Intel platforms which are incapable of
safely honoring guest PAT (i.e., without CPU safely honoring guest PAT (i.e., without CPU
self-snoop, KVM always ignores guest PAT and self-snoop, KVM always ignores guest PAT and
forces effective memory type to WB). It is forces effective memory type to WB). It is
also ignored on AMD platforms or, on Intel, also ignored on AMD platforms or, on Intel,
when a VM has non-coherent DMA devices when a VM has non-coherent DMA devices
assigned; KVM always honors guest PAT in assigned; KVM always honors guest PAT in
such case. The quirk is needed to avoid such case. The quirk is needed to avoid
slowdowns on certain Intel Xeon platforms slowdowns on certain Intel Xeon platforms
(e.g. ICX, SPR) where self-snoop feature is (e.g. ICX, SPR) where self-snoop feature is
supported but UC is slow enough to cause supported but UC is slow enough to cause
issues with some older guests that use issues with some older guests that use
UC instead of WC to map the video RAM. UC instead of WC to map the video RAM.
Userspace can disable the quirk to honor Userspace can disable the quirk to honor
guest PAT if it knows that there is no such guest PAT if it knows that there is no such
guest software, for example if it does not guest software, for example if it does not
expose a bochs graphics device (which is expose a bochs graphics device (which is
known to have had a buggy driver). known to have had a buggy driver).
KVM_X86_QUIRK_VMCS12_ALLOW_FREEZE_IN_SMM By default, KVM relaxes the consistency KVM_X86_QUIRK_VMCS12_ALLOW_FREEZE_IN_SMM By default, KVM relaxes the consistency
check for GUEST_IA32_DEBUGCTL in vmcs12 check for GUEST_IA32_DEBUGCTL in vmcs12
to allow FREEZE_IN_SMM to be set. When to allow FREEZE_IN_SMM to be set. When
this quirk is disabled, KVM requires this this quirk is disabled, KVM requires this
bit to be cleared. Note that the vmcs02 bit to be cleared. Note that the vmcs02
bit is still completely controlled by the bit is still completely controlled by the
host, regardless of the quirk setting. host, regardless of the quirk setting.
=================================== ============================================ ======================================== ================================================
7.32 KVM_CAP_MAX_VCPU_ID 7.32 KVM_CAP_MAX_VCPU_ID
------------------------ ------------------------