dt-bindings: i2c: hisilicon,hix5hd2: convert to DT schema

Convert the Devicetree binding documentation for hisilicon,hix5hd2-i2c
from plain text to DT binding schema.

Signed-off-by: Kael D'Alcamo <dev@kael-k.io>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
This commit is contained in:
Kael D'Alcamo 2025-10-08 22:04:27 +02:00 committed by Wolfram Sang
parent d51e7cfca3
commit eb4faf6343
2 changed files with 51 additions and 24 deletions

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/hisilicon,hix5hd2-i2c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: I2C for HiSilicon hix5hd2 chipset platform
maintainers:
- Wei Yan <sledge.yanwei@huawei.com>
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
properties:
compatible:
enum:
- hisilicon,hix5hd2-i2c
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-frequency:
description: Desired I2C bus frequency in Hz
default: 100000
required:
- compatible
- reg
- interrupts
- clocks
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/hix5hd2-clock.h>
i2c@f8b10000 {
compatible = "hisilicon,hix5hd2-i2c";
reg = <0xf8b10000 0x1000>;
interrupts = <0 38 4>;
clocks = <&clock HIX5HD2_I2C0_RST>;
#address-cells = <1>;
#size-cells = <0>;
};

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I2C for Hisilicon hix5hd2 chipset platform
Required properties:
- compatible: Must be "hisilicon,hix5hd2-i2c"
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: interrupt number to the cpu.
- #address-cells = <1>;
- #size-cells = <0>;
- clocks: phandles to input clocks.
Optional properties:
- clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000
- Child nodes conforming to i2c bus binding
Examples:
I2C0@f8b10000 {
compatible = "hisilicon,hix5hd2-i2c";
reg = <0xf8b10000 0x1000>;
interrupts = <0 38 4>;
clocks = <&clock HIX5HD2_I2C0_RST>;
#address-cells = <1>;
#size-cells = <0>;
}