linux

Commit Graph

Author	SHA1	Message	Date
Linus Torvalds	9b725d5959	phy-for-7.0 - Core - Add suuport for "rx-polarity" and "tx-polarity" device tree properties and phy common properties to manage this - New Support - Qualcomm Glymur PCIe Gen4 2-lanes PCIe phy, DP and edp phy support, USB UNI PHY support and SMB2370 eUSB2 repeater support. SC8280xp QMP UFS PHY support, Kaanapali PCIe phy and QMP PHY support, QCS615 QMP USB3+DP PHY and driver support for that. - SpacemiT PCIe/combo PHY and K1 USB2 PHY driver. - HDMI 2.1 FRL configuration support and driver enabling for rockchip samsung-hdptx driver. - TI TCAN1046 phy support. - Renesas RZ/V2H(P) and RZ/V2N usb3 support - Mediatek MT8188 hdmi-phy support - Google Tensor SoC USB PHY driver - Apple Type-C PHY support - Updates - Subsystem conversion for clock round_rate() to determine_rate() - TI USB3 DT schema conversion - Samsung ExynosAutov920 usb3, combo hsphy and ssphy support -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmmUivwACgkQfBQHDyUj g0cbiQ/6A88WwlDoA/hh5NFN/5mkloHaVvcbYEraqvkzpdsWjCXOxQXfCBC5IVI+ BOn8GjjVEQMKLs8V7LXF/ZdGGJ+DI0TOod1GLrgKX/q8YL6XTxZ5DThWqSZrVRBI SXY8/PFu6t12frVN7+f5l00m3/e/V1vdO1s1TBIzsrIt72RWI9vggjaLG9Gi0q3/ XBvgJFHV7/S5QIpn4+mL8b/r0CUshUnRX4VkIn5nRT+QUlZejs4RcuB322NF5Cva ghFPLv5wrniZl6PGRsQyoEtPNS1mjJpnbKf0HqU/4BeaaVh+ylDu4ooXxH6w3E4v vpk93MT3ZZXJWb1I6LkHJJnm5E5J8QRqhJXaeAoYXNsQZBx1L3CkpZG9DR2nO7V5 fv2eL/C2uDbPRovj4OT4BNAHXziqqjFTpS8se0U8MNG0qri0KmPJmP6MkSHM+pLg USOsln+geUBsMkbqrDmy4RLPvP61qqid8RsPXxZoQpJiIrAL8WoT1JQ2DOh6NwqJ IyPicLPihevXCvvLGm44HfYOHAcG+IGCD71vwOxnRkLFefc10Lg9FhnzHCKrnJvR ELbx8ucu5+XRsL4mJa8DU6bi8DF4unzVpfBPvmguZtGS1noaDnsYGO5xTMeHZGMX WASaH25iuEtXgLXfeeHvkxqPXP2oZHqVRT4rlIZ7O7ODU79Dshw= =6ibD -----END PGP SIGNATURE----- Merge tag 'phy-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "Core: - Add suuport for "rx-polarity" and "tx-polarity" device tree properties and phy common properties to manage this New Support: - Qualcomm Glymur PCIe Gen4 2-lanes PCIe phy, DP and edp phy, USB UNI PHY and SMB2370 eUSB2 repeater. SC8280xp QMP UFS PHY, Kaanapali PCIe phy and QMP PHY, QCS615 QMP USB3+DP PHY and driver support for that. - SpacemiT PCIe/combo PHY and K1 USB2 PHY driver. - HDMI 2.1 FRL configuration support and driver enabling for rockchip samsung-hdptx driver - TI TCAN1046 phy - Renesas RZ/V2H(P) and RZ/V2N usb3 - Mediatek MT8188 hdmi-phy - Google Tensor SoC USB PHY driver - Apple Type-C PHY Updates: - Subsystem conversion for clock round_rate() to determine_rate() - TI USB3 DT schema conversion - Samsung ExynosAutov920 usb3, combo hsphy and ssphy support" * tag 'phy-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (143 commits) phy: ti: phy-j721e-wiz: convert from divider_round_rate() to divider_determine_rate() dt-bindings: phy: ti,control-phy-otghs: convert to DT schema dt-bindings: phy: ti,phy-usb3: convert to DT schema phy: tegra: xusb: Remove unused powered_on variable phy: renesas: rcar-gen3-usb2: add regulator dependency phy: GOOGLE_USB: add TYPEC dependency phy: enter drivers/phy/Makefile even without CONFIG_GENERIC_PHY phy: renesas: rcar-gen3-usb2: Use mux-state for phyrst management phy: renesas: rcar-gen3-usb2: Add regulator for OTG VBUS control phy: renesas: rcar-gen3-usb2: Use devm_pm_runtime_enable() phy: renesas: rcar-gen3-usb2: Factor out VBUS control logic dt-bindings: phy: renesas,usb2-phy: Document RZ/G3E SoC dt-bindings: phy: renesas,usb2-phy: Document mux-states property dt-bindings: phy: renesas,usb2-phy: Document USB VBUS regulator phy: rockchip: samsung-hdptx: Add HDMI 2.1 FRL support phy: rockchip: samsung-hdptx: Extend rk_hdptx_phy_verify_hdmi_config() helper phy: rockchip: samsung-hdptx: Switch to driver specific HDMI config phy: rockchip: samsung-hdptx: Drop hw_rate driver data phy: rockchip: samsung-hdptx: Compute clk rate from PLL config phy: rockchip: samsung-hdptx: Cleanup *_cmn_init_seq lists ...	2026-02-17 11:40:04 -08:00
Linus Torvalds	505d195b0f	Char/Misc/IIO driver changes for 7.0-rc1 Here is the big set of char/misc/iio and other smaller driver subsystem changes for 7.0-rc1. Lots of little things in here, including: - Loads of iio driver changes and updates and additions - gpib driver updates - interconnect driver updates - i3c driver updates - hwtracing (coresight and intel) driver updates - deletion of the obsolete mwave driver - binder driver updates (rust and c versions) - mhi driver updates (causing a merge conflict, see below) - mei driver updates - fsi driver updates - eeprom driver updates - lots of other small char and misc driver updates and cleanups All of these have been in linux-next for a while, with no reported issues except for a merge conflict with your tree due to the mhi driver changes in the drivers/net/wireless/ath/ath12k/mhi.c file. To fix that up, just delete the "auto_queue" structure fields being set, see this message for the full change needed: https://lore.kernel.org/r/aXD6X23btw8s-RZP@sirena.org.uk Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCaZRxOg8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ykIrACgs9S+A/GG9X0Kvc+ND/J1XYZpj3QAoKl0yXGj SV1SR/giEBc7iKV6Dn6O =jbok -----END PGP SIGNATURE----- Merge tag 'char-misc-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc/IIO driver updates from Greg KH: "Here is the big set of char/misc/iio and other smaller driver subsystem changes for 7.0-rc1. Lots of little things in here, including: - Loads of iio driver changes and updates and additions - gpib driver updates - interconnect driver updates - i3c driver updates - hwtracing (coresight and intel) driver updates - deletion of the obsolete mwave driver - binder driver updates (rust and c versions) - mhi driver updates (causing a merge conflict, see below) - mei driver updates - fsi driver updates - eeprom driver updates - lots of other small char and misc driver updates and cleanups All of these have been in linux-next for a while, with no reported issues" * tag 'char-misc-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (297 commits) mux: mmio: fix regmap leak on probe failure rust_binder: return p from rust_binder_transaction_target_node() drivers: android: binder: Update ARef imports from sync::aref rust_binder: fix needless borrow in context.rs iio: magn: mmc5633: Fix Kconfig for combination of I3C as module and driver builtin iio: sca3000: Fix a resource leak in sca3000_probe() iio: proximity: rfd77402: Add interrupt handling support iio: proximity: rfd77402: Document device private data structure iio: proximity: rfd77402: Use devm-managed mutex initialization iio: proximity: rfd77402: Use kernel helper for result polling iio: proximity: rfd77402: Align polling timeout with datasheet iio: cros_ec: Allow enabling/disabling calibration mode iio: frequency: ad9523: correct kernel-doc bad line warning iio: buffer: buffer_impl.h: fix kernel-doc warnings iio: gyro: itg3200: Fix unchecked return value in read_raw MAINTAINERS: add entry for ADE9000 driver iio: accel: sca3000: remove unused last_timestamp field iio: accel: adxl372: remove unused int2_bitmask field iio: adc: ad7766: Use iio_trigger_generic_data_rdy_poll() iio: magnetometer: Remove IRQF_ONESHOT ...	2026-02-17 09:11:04 -08:00
Linus Torvalds	13c916af3a	Not much changed in the clk framework this time except the clk.h consumer API moved the context saving APIs around to fix a build error in certain configurations. There was a change to the core framework for CLK_OPS_PARENT_ENABLE behavior during registration, but it wrecked existing drivers that didn't expect things to be turned off during clk registration so it got reverted. This cycle is really a large collection of new clk drivers, primarily for Qualcomm SoCs but also for Amlogic, SpacemiT, Google, and Aspeed. Another big change in here is support for automatic hardware clock gating on Samsung SoCs where the clks turn on and off when needed. Ideally more vendors move to this method for better power savings. The highlights are in the updates section below. Beyond all the new drivers we have a bunch of cleanups like converting drivers from divider_round_rate() to divider_determine_rate() and using scoped for each OF child loops. Otherwise it's the usual data fixes and plugging reference leaks, etc. that's all pretty ordinary but not critical enough to fix until the next release. New Drivers: - Qualcomm Kaanapali global, tcsr, rpmh, display, gpu, camera, and video clk controllers - Qualcomm SM8750 camera clk controllers - Qualcomm MSM8940 and SDM439 global clk controllers - Google GS101 Display Process Unit (DPU) clk controllers - SpacemiT K3 clk controllers - Amlogic t7 clk controllers - Aspeed AST2700 clk controllers Updates: - Convert clock dividers from round_rate() to determine_rate() - Fix sparse warnings, kernel-doc warnings, and plug leaked OF refs - Automatic hardware clk gating on Google GS101 SoCs - Amlogic s4 video clks - CAN-FD clks and resets on Renesas RZ/T2H, RZ/N2H, RZ/V2H, and RZ/V2N - Expanded Serial Peripheral Interface (xSPI) clocks and resets on Renesas RZ/T21H and RZ/N2H - DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks and resets on Renesas RZ/V2N - More serial (RSCI) clocks and resets on Renesas RZ/V2H and RZ/V2N - CPU frequency scaling on T-HEAD TH1520 -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmmRJfYUHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSUmIhAAttGxK++IiMe1XTPOezlf6jXP4Hj/ /RAJchCs4y9NeGzOAnwQeGHMSNz70PFcZ3hYAS7w32GHQI+4VHKlmrgT62TqJMCl 79jvQuojGngJcW5uQ531WYB/Iy76b8U+RBiAtFCrfYZa50HAWLtaUPYLXlrDev78 Gx6XZULykcveMp1sC8zQt2zjHaJNs1x8cVD5dVhT8fD/KVw0au0I0f0C/S9qjvXG NQVn2uSCz4/LkyZ63hxcELJuVEaGojKBD3ne+3EL8ELv/8jz2PT51mgyhWDvlH4A JSgpdqpkIDnGZgEKt7BPEMLQaFTqD3c3MTQ87bhuTN/S16cG/cS3zTDT14/5nry7 uUGFM5KTtZGRbJaYAQSiNtFLhNt6/j33XmhmjrAqN+tmt+M47URzxt3CMHpIE2hK +zghb83OU2Rm1fe7xd5K0J/gcA7gKXgAnwqWqATniIrCFmYqSRh9LTr+gtAqrKs0 smT9yav1rl+EVMG8xtCkjEUpGmYe1rvLVwcL7ODvZACW7Q/udjy6qYWV3CLHAVRy QTnUkj05Ahk0I6qPWOvVPDRfMWCHdbyHiUzkPckuq+3TTSjm4GmqgqQO3XTtxcuF G+LeeNVb3IwkDNrwmWCs/GGW3fAxQKnDTULqrb0eZhjMmW/OTtXGi99E9BeD0Ucu o0HecyE5H+oIjtc= =Zx/F -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Not much changed in the clk framework this time except the clk.h consumer API moved the context saving APIs around to fix a build error in certain configurations. There was a change to the core framework for CLK_OPS_PARENT_ENABLE behavior during registration, but it wrecked existing drivers that didn't expect things to be turned off during clk registration so it got reverted. This cycle is really a large collection of new clk drivers, primarily for Qualcomm SoCs but also for Amlogic, SpacemiT, Google, and Aspeed. Another big change in here is support for automatic hardware clock gating on Samsung SoCs where the clks turn on and off when needed. Ideally more vendors move to this method for better power savings. The highlights are in the updates section below. Beyond all the new drivers we have a bunch of cleanups like converting drivers from divider_round_rate() to divider_determine_rate() and using scoped for each OF child loops. Otherwise it's the usual data fixes and plugging reference leaks, etc. that's all pretty ordinary but not critical enough to fix until the next release. New Drivers: - Qualcomm Kaanapali global, tcsr, rpmh, display, gpu, camera, and video clk controllers - Qualcomm SM8750 camera clk controllers - Qualcomm MSM8940 and SDM439 global clk controllers - Google GS101 Display Process Unit (DPU) clk controllers - SpacemiT K3 clk controllers - Amlogic t7 clk controllers - Aspeed AST2700 clk controllers Updates: - Convert clock dividers from round_rate() to determine_rate() - Fix sparse warnings, kernel-doc warnings, and plug leaked OF refs - Automatic hardware clk gating on Google GS101 SoCs - Amlogic s4 video clks - CAN-FD clks and resets on Renesas RZ/T2H, RZ/N2H, RZ/V2H, and RZ/V2N - Expanded Serial Peripheral Interface (xSPI) clocks and resets on Renesas RZ/T21H and RZ/N2H - DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks and resets on Renesas RZ/V2N - More serial (RSCI) clocks and resets on Renesas RZ/V2H and RZ/V2N - CPU frequency scaling on T-HEAD TH1520" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (165 commits) clk: aspeed: Add reset for HACE/VIDEO dt-bindings: clock: aspeed: Add VIDEO reset definition clk: aspeed: add AST2700 clock driver MAINTAINERS: Add entry for ASPEED clock drivers. clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory. Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc" clk: Disable KUNIT_UML_PCI dt-bindings: clk: rs9: Fix DIF pattern match clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS() clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841 clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: mediatek: Fix error handling in runtime PM setup clk: mediatek: don't select clk-mt8192 for all ARM64 builds clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks clk: mediatek: Refactor pllfh registration to pass device clk: mediatek: Pass device to clk_hw_register for PLLs clk: mediatek: Refactor pll registration to pass device clk: Respect CLK_OPS_PARENT_ENABLE during recalc ...	2026-02-15 08:18:57 -08:00
Stephen Boyd	5921ae27ea	Merge branches 'clk-aspeed' and 'clk-qcom' into clk-next * clk-aspeed: clk: aspeed: Add reset for HACE/VIDEO dt-bindings: clock: aspeed: Add VIDEO reset definition clk: aspeed: add AST2700 clock driver MAINTAINERS: Add entry for ASPEED clock drivers. clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory. * clk-qcom: (49 commits) clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc clk: qcom: gfx3d: add parent to parent request map clk: qcom: dispcc-sm7150: Fix dispcc_mdss_pclk1_clk_src clk: qcom: dispcc-sdm845: Enable parents for pixel clocks clk: qcom: regmap-divider: convert from divider_round_rate() to divider_determine_rate() clk: qcom: regmap-divider: convert from divider_ro_round_rate() to divider_ro_determine_rate() clk: qcom: alpha-pll: convert from divider_round_rate() to divider_determine_rate() clk: qcom: Add support for GPUCC and GXCLK for Kaanapali clk: qcom: Add support for VideoCC driver for Kaanapali clk: qcom: camcc: Add support for camera clock controller for Kaanapali clk: qcom: dispcc: Add support for display clock controller Kaanapali clk: qcom: clk-alpha-pll: Add support for controlling Pongo EKO_T PLL clk: qcom: clk-alpha-pll: Update the PLL support for cal_l clk: qcom: camcc: Add camera clock controller driver for SM8750 SoC clk: qcom: clk-alpha-pll: Add support for controlling Rivian PLL dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller dt-bindings: clock: qcom: Add Kaanapali video clock controller dt-bindings: clock: qcom: Add support for CAMCC for Kaanapali dt-bindings: clock: qcom: document Kaanapali DISPCC clock controller dt-bindings: clock: qcom: Add camera clock controller for SM8750 SoC ...	2026-02-14 10:23:59 -08:00
Stephen Boyd	b675697d80	Merge branches 'clk-amlogic', 'clk-thead', 'clk-mediatek' and 'clk-samsung' into clk-next * clk-amlogic: clk: meson: gxbb: use the existing HHI_HDMI_PLL_CNTL3 macro clk: meson: g12a: Limit the HDMI PLL OD to /4 clk: meson: gxbb: Limit the HDMI PLL OD to /4 on GXL/GXM SoCs clk: amlogic: remove potentially unsafe flags from S4 video clocks clk: amlogic: add video-related clocks for S4 SoC dt-bindings: clock: add video clock indices for Amlogic S4 SoC clk: meson: t7: add t7 clock peripherals controller driver clk: meson: t7: add support for the T7 SoC PLL clock dt-bindings: clock: add Amlogic T7 peripherals clock controller dt-bindings: clock: add Amlogic T7 SCMI clock controller dt-bindings: clock: add Amlogic T7 PLL clock controller * clk-thead: clk: thead: th1520-ap: Support CPU frequency scaling clk: thead: th1520-ap: Add macro to define multiplexers with flags clk: thead: th1520-ap: Support setting PLL rates clk: thead: th1520-ap: Add C910 bus clock clk: thead: th1520-ap: Poll for PLL lock and wait for stability dt-bindings: clock: thead,th1520-clk-ap: Add ID for C910 bus clock * clk-mediatek: Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc" clk: mediatek: Fix error handling in runtime PM setup clk: mediatek: don't select clk-mt8192 for all ARM64 builds clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks clk: mediatek: Refactor pllfh registration to pass device clk: mediatek: Pass device to clk_hw_register for PLLs clk: mediatek: Refactor pll registration to pass device clk: Respect CLK_OPS_PARENT_ENABLE during recalc dt-bindings: clock: mediatek,mt7622-pciesys: Remove syscon compatible clk: mediatek: Drop __initconst from gates * clk-samsung: clk: samsung: gs101: add support for Display Process Unit (DPU) clocks dt-bindings: samsung: exynos-sysreg: add gs101 dpu compatible dt-bindings: clock: google,gs101-clock: Add DPU clock management unit dt-bindings: clock: google,gs101-clock: fix alphanumeric ordering clk: samsung: fix sysreg save/restore when PM is enabled for CMU clk: samsung: avoid warning message on legacy Exynos (auto clock gating) clk: samsung: gs101: Enable auto_clock_gate mode for each gs101 CMU clk: samsung: Implement automatic clock gating mode for CMUs dt-bindings: clock: google,gs101-clock: add samsung,sysreg property as required clk: samsung: exynosautov920: add clock support dt-bindings: clock: exynosautov920: add MFD clock definitions	2026-02-14 10:23:37 -08:00
Stephen Boyd	16c3c4e288	Merge branches 'clk-renesas', 'clk-cleanup', 'clk-spacemit' and 'clk-tegra' into clk-next * clk-renesas: (25 commits) dt-bindings: clk: rs9: Fix DIF pattern match clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS() clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841 clk: renesas: Add missing log message terminators clk: renesas: rzg2l: Remove DSI clock rate restrictions clk: renesas: rzv2h: Deassert reset on assert timeout clk: renesas: rzg2l: Deassert reset on assert timeout clk: renesas: cpg-mssr: Unlock before reset verification clk: renesas: r9a09g056: Add entries for CANFD clk: renesas: r9a09g057: Add entries for CANFD clk: renesas: r9a09g077: Add CANFD clocks clk: renesas: cpg-mssr: Handle RZ/T2H register layout in PM callbacks dt-bindings: clock: renesas,r9a09g077/87: Add PCLKCAN ID clk: renesas: cpg-mssr: Simplify pointer math in cpg_rzt2h_mstp_read() clk: renesas: r9a09g056: Add clock and reset entries for TSU clk: renesas: r9a09g057: Add entries for RSCIs clk: renesas: r9a09g056: Add entries for RSCIs clk: renesas: r9a09g056: Add entries for the RSPIs clk: renesas: r9a09g056: Add entries for ICU clk: renesas: r9a09g056: Add entries for the DMACs ... * clk-cleanup: clk: Disable KUNIT_UML_PCI clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: tegra: tegra124-emc: fix device leak on set_rate() clk: Annotate #else and #endif clk: Merge prepare and unprepare sections clk: Move clk_{save,restore}_context() to COMMON_CLK section clk: clk-apple-nco: Add "apple,t8103-nco" compatible clk: versatile: impd1: Simplify with scoped for each OF child loop clk: scpi: Simplify with scoped for each OF child loop clk: lmk04832: Simplify with scoped for each OF child loop * clk-spacemit: clk: spacemit: k3: add the clock tree clk: spacemit: k3: extract common header clk: spacemit: ccu_pll: add plla type clock clk: spacemit: ccu_mix: add inverted enable gate clock dt-bindings: soc: spacemit: k3: add clock support clk: spacemit: add platform SoC prefix to reset name clk: spacemit: extract common ccu functions reset: spacemit: fix auxiliary device id clk: spacemit: prepare common ccu header clk: spacemit: Hide common clock driver from user controller clk: spacemit: Respect Kconfig setting when building modules * clk-tegra: clk: tegra30: Add CSI pad clock gates clk: tegra: Set CSUS as vi_sensor's gate for Tegra20, Tegra30 and Tegra114 clk: tegra20: Reparent dsi clock to pll_d_out0 clk: tegra: tegra124-emc: Simplify with scoped for each OF child loop clk: tegra: Adjust callbacks in tegra_clock_pm clk: tegra: tegra124-emc: Fix potential memory leak in tegra124_clk_register_emc()	2026-02-14 10:23:04 -08:00
Linus Torvalds	37a93dd5c4	Networking changes for 7.0 Core & protocols ---------------- - A significant effort all around the stack to guide the compiler to make the right choice when inlining code, to avoid unneeded calls for small helper and stack canary overhead in the fast-path. This generates better and faster code with very small or no text size increases, as in many cases the call generated more code than the actual inlined helper. - Extend AccECN implementation so that is now functionally complete, also allow the user-space enabling it on a per network namespace basis. - Add support for memory providers with large (above 4K) rx buffer. Paired with hw-gro, larger rx buffer sizes reduce the number of buffers traversing the stack, dincreasing single stream CPU usage by up to ~30%. - Do not add HBH header to Big TCP GSO packets. This simplifies the RX path, the TX path and the NIC drivers, and is possible because user-space taps can now interpret correctly such packets without the HBH hint. - Allow IPv6 routes to be configured with a gateway address that is resolved out of a different interface than the one specified, aligning IPv6 to IPv4 behavior. - Multi-queue aware sch_cake. This makes it possible to scale the rate shaper of sch_cake across multiple CPUs, while still enforcing a single global rate on the interface. - Add support for the nbcon (new buffer console) infrastructure to netconsole, enabling lock-free, priority-based console operations that are safer in crash scenarios. - Improve the TCP ipv6 output path to cache the flow information, saving cpu cycles, reducing cache line misses and stack use. - Improve netfilter packet tracker to resolve clashes for most protocols, avoiding unneeded drops on rare occasions. - Add IP6IP6 tunneling acceleration to the flowtable infrastructure. - Reduce tcp socket size by one cache line. - Notify neighbour changes atomically, avoiding inconsistencies between the notification sequence and the actual states sequence. - Add vsock namespace support, allowing complete isolation of vsocks across different network namespaces. - Improve xsk generic performances with cache-alignment-oriented optimizations. - Support netconsole automatic target recovery, allowing netconsole to reestablish targets when underlying low-level interface comes back online. Driver API ---------- - Support for switching the working mode (automatic vs manual) of a DPLL device via netlink. - Introduce PHY ports representation to expose multiple front-facing media ports over a single MAC. - Introduce "rx-polarity" and "tx-polarity" device tree properties, to generalize polarity inversion requirements for differential signaling. - Add helper to create, prepare and enable managed clocks. Device drivers -------------- - Add Huawei hinic3 PF etherner driver. - Add DWMAC glue driver for Motorcomm YT6801 PCIe ethernet controller. - Add ethernet driver for MaxLinear MxL862xx switches - Remove parallel-port Ethernet driver. - Convert existing driver timestamp configuration reporting to hwtstamp_get and remove legacy ioctl(). - Convert existing drivers to .get_rx_ring_count(), simplifing the RX ring count retrieval. Also remove the legacy fallback path. - Ethernet high-speed NICs: - Broadcom (bnxt, bng): - bnxt: add FW interface update to support FEC stats histogram and NVRAM defragmentation - bng: add TSO and H/W GRO support - nVidia/Mellanox (mlx5): - improve latency of channel restart operations, reducing the used H/W resources - add TSO support for UDP over GRE over VLAN - add flow counters support for hardware steering (HWS) rules - use a static memory area to store headers for H/W GRO, leading to 12% RX tput improvement - Intel (100G, ice, idpf): - ice: reorganizes layout of Tx and Rx rings for cacheline locality and utilizes __cacheline_group* macros on the new layouts - ice: introduces Synchronous Ethernet (SyncE) support - Meta (fbnic): - adds debugfs for firmware mailbox and tx/rx rings vectors - Ethernet virtual: - geneve: introduce GRO/GSO support for double UDP encapsulation - Ethernet NICs consumer, and embedded: - Synopsys (stmmac): - some code refactoring and cleanups - RealTek (r8169): - add support for RTL8127ATF (10G Fiber SFP) - add dash and LTR support - Airoha: - AN8811HB 2.5 Gbps phy support - Freescale (fec): - add XDP zero-copy support - Thunderbolt: - add get link setting support to allow bonding - Renesas: - add support for RZ/G3L GBETH SoC - Ethernet switches: - Maxlinear: - support R(G)MII slow rate configuration - add support for Intel GSW150 - Motorcomm (yt921x): - add DCB/QoS support - TI: - icssm-prueth: support bridging (STP/RSTP) via the switchdev framework - Ethernet PHYs: - Realtek: - enable SGMII and 2500Base-X in-band auto-negotiation - simplify and reunify C22/C45 drivers - Micrel: convert bindings to DT schema - CAN: - move skb headroom content into skb extensions, making CAN metadata access more robust - CAN drivers: - rcar_canfd: - add support for FD-only mode - add support for the RZ/T2H SoC - sja1000: cleanup the CAN state handling - WiFi: - implement EPPKE/802.1X over auth frames support - split up drop reasons better, removing generic RX_DROP - additional FTM capabilities: 6 GHz support, supported number of spatial streams and supported number of LTF repetitions - better mac80211 iterators to enumerate resources - initial UHR (Wi-Fi 8) support for cfg80211/mac80211 - WiFi drivers: - Qualcomm/Atheros: - ath11k: support for Channel Frequency Response measurement - ath12k: a significant driver refactor to support multi-wiphy devices and and pave the way for future device support in the same driver (rather than splitting to ath13k) - ath12k: support for the QCC2072 chipset - Intel: - iwlwifi: partial Neighbor Awareness Networking (NAN) support - iwlwifi: initial support for U-NII-9 and IEEE 802.11bn - RealTek (rtw89): - preparations for RTL8922DE support - Bluetooth: - implement setsockopt(BT_PHY) to set the connection packet type/PHY - set link_policy on incoming ACL connections - Bluetooth drivers: - btusb: add support for MediaTek7920, Realtek RTL8761BU and 8851BE - btqca: add WCN6855 firmware priority selection feature Signed-off-by: Paolo Abeni <pabeni@redhat.com> -----BEGIN PGP SIGNATURE----- iQJGBAABCgAwFiEEg1AjqC77wbdLX2LbKSR5jcyPE6QFAmmMum4SHHBhYmVuaUBy ZWRoYXQuY29tAAoJECkkeY3MjxOkDnMP/3bpHAGj+gylTid3Xsj0TjJ8AkPsQs+W uvSMiCB1TvGCTD9kK36Vr+qPoIgJY10UxYMMjt5Gs0A9TvGDDfYnUOVoUIkfkWCH grqSdp6dVkyaJVfyLEcuOVQQG2HwEnhC4c3ZOhOxaKNAnsLCP142lYsMR9ktGRuA 4vDGtz1+y7t8qBk/lyfXDM71KRrtq0HWJZIhmhz8QXTBsgPDfSejbTPNxXQOJoeO sKeArsHr/Cmvf89ZtLZ63vbfr4BKDm4PeXqPYR3PrQs2Yu6I1EK4lehygTY2yE2O I3MEPlvpa/tiVLxqXNNwEFbYIkMPY6FXS9x05hTxNZM65A6aB3vvdkqPVnVmAlXE f+4PYg9paI13lbzZOeQbGfZ5HgPpzQvnginaaX6s9Fp12K3Ll1FkwWdUznFWhzVn 5LSrGyecR00CdKJByTIw9JGg/1ptz5a57pa8OQmcKRx3WhQ1XeV5TIJQF4QcPgHw ApyjmeGDTQMQMzha1fsaVr+i6BK2zgZvKK9uGDTX90xn2JUw/M75tyOlsTtGlnuM sZgj0KVGQlG2wLwBB/+D4S9Oi9YlPG00rkCs0E4jk5C/G4NBmMgpEPQg6azkb57h Uiy0paohxfwcZ3qbGA9In091ClGqIwOiCBaq+uXRq1ro88Neo6PWkjz5ItNrsD8t Ttgd5AVAQyPT =O31Y -----END PGP SIGNATURE----- Merge tag 'net-next-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Paolo Abeni: "Core & protocols: - A significant effort all around the stack to guide the compiler to make the right choice when inlining code, to avoid unneeded calls for small helper and stack canary overhead in the fast-path. This generates better and faster code with very small or no text size increases, as in many cases the call generated more code than the actual inlined helper. - Extend AccECN implementation so that is now functionally complete, also allow the user-space enabling it on a per network namespace basis. - Add support for memory providers with large (above 4K) rx buffer. Paired with hw-gro, larger rx buffer sizes reduce the number of buffers traversing the stack, dincreasing single stream CPU usage by up to ~30%. - Do not add HBH header to Big TCP GSO packets. This simplifies the RX path, the TX path and the NIC drivers, and is possible because user-space taps can now interpret correctly such packets without the HBH hint. - Allow IPv6 routes to be configured with a gateway address that is resolved out of a different interface than the one specified, aligning IPv6 to IPv4 behavior. - Multi-queue aware sch_cake. This makes it possible to scale the rate shaper of sch_cake across multiple CPUs, while still enforcing a single global rate on the interface. - Add support for the nbcon (new buffer console) infrastructure to netconsole, enabling lock-free, priority-based console operations that are safer in crash scenarios. - Improve the TCP ipv6 output path to cache the flow information, saving cpu cycles, reducing cache line misses and stack use. - Improve netfilter packet tracker to resolve clashes for most protocols, avoiding unneeded drops on rare occasions. - Add IP6IP6 tunneling acceleration to the flowtable infrastructure. - Reduce tcp socket size by one cache line. - Notify neighbour changes atomically, avoiding inconsistencies between the notification sequence and the actual states sequence. - Add vsock namespace support, allowing complete isolation of vsocks across different network namespaces. - Improve xsk generic performances with cache-alignment-oriented optimizations. - Support netconsole automatic target recovery, allowing netconsole to reestablish targets when underlying low-level interface comes back online. Driver API: - Support for switching the working mode (automatic vs manual) of a DPLL device via netlink. - Introduce PHY ports representation to expose multiple front-facing media ports over a single MAC. - Introduce "rx-polarity" and "tx-polarity" device tree properties, to generalize polarity inversion requirements for differential signaling. - Add helper to create, prepare and enable managed clocks. Device drivers: - Add Huawei hinic3 PF etherner driver. - Add DWMAC glue driver for Motorcomm YT6801 PCIe ethernet controller. - Add ethernet driver for MaxLinear MxL862xx switches - Remove parallel-port Ethernet driver. - Convert existing driver timestamp configuration reporting to hwtstamp_get and remove legacy ioctl(). - Convert existing drivers to .get_rx_ring_count(), simplifing the RX ring count retrieval. Also remove the legacy fallback path. - Ethernet high-speed NICs: - Broadcom (bnxt, bng): - bnxt: add FW interface update to support FEC stats histogram and NVRAM defragmentation - bng: add TSO and H/W GRO support - nVidia/Mellanox (mlx5): - improve latency of channel restart operations, reducing the used H/W resources - add TSO support for UDP over GRE over VLAN - add flow counters support for hardware steering (HWS) rules - use a static memory area to store headers for H/W GRO, leading to 12% RX tput improvement - Intel (100G, ice, idpf): - ice: reorganizes layout of Tx and Rx rings for cacheline locality and utilizes __cacheline_group* macros on the new layouts - ice: introduces Synchronous Ethernet (SyncE) support - Meta (fbnic): - adds debugfs for firmware mailbox and tx/rx rings vectors - Ethernet virtual: - geneve: introduce GRO/GSO support for double UDP encapsulation - Ethernet NICs consumer, and embedded: - Synopsys (stmmac): - some code refactoring and cleanups - RealTek (r8169): - add support for RTL8127ATF (10G Fiber SFP) - add dash and LTR support - Airoha: - AN8811HB 2.5 Gbps phy support - Freescale (fec): - add XDP zero-copy support - Thunderbolt: - add get link setting support to allow bonding - Renesas: - add support for RZ/G3L GBETH SoC - Ethernet switches: - Maxlinear: - support R(G)MII slow rate configuration - add support for Intel GSW150 - Motorcomm (yt921x): - add DCB/QoS support - TI: - icssm-prueth: support bridging (STP/RSTP) via the switchdev framework - Ethernet PHYs: - Realtek: - enable SGMII and 2500Base-X in-band auto-negotiation - simplify and reunify C22/C45 drivers - Micrel: convert bindings to DT schema - CAN: - move skb headroom content into skb extensions, making CAN metadata access more robust - CAN drivers: - rcar_canfd: - add support for FD-only mode - add support for the RZ/T2H SoC - sja1000: cleanup the CAN state handling - WiFi: - implement EPPKE/802.1X over auth frames support - split up drop reasons better, removing generic RX_DROP - additional FTM capabilities: 6 GHz support, supported number of spatial streams and supported number of LTF repetitions - better mac80211 iterators to enumerate resources - initial UHR (Wi-Fi 8) support for cfg80211/mac80211 - WiFi drivers: - Qualcomm/Atheros: - ath11k: support for Channel Frequency Response measurement - ath12k: a significant driver refactor to support multi-wiphy devices and and pave the way for future device support in the same driver (rather than splitting to ath13k) - ath12k: support for the QCC2072 chipset - Intel: - iwlwifi: partial Neighbor Awareness Networking (NAN) support - iwlwifi: initial support for U-NII-9 and IEEE 802.11bn - RealTek (rtw89): - preparations for RTL8922DE support - Bluetooth: - implement setsockopt(BT_PHY) to set the connection packet type/PHY - set link_policy on incoming ACL connections - Bluetooth drivers: - btusb: add support for MediaTek7920, Realtek RTL8761BU and 8851BE - btqca: add WCN6855 firmware priority selection feature" * tag 'net-next-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1254 commits) bnge/bng_re: Add a new HSI net: macb: Fix tx/rx malfunction after phy link down and up af_unix: Fix memleak of newsk in unix_stream_connect(). net: ti: icssg-prueth: Add optional dependency on HSR net: dsa: add basic initial driver for MxL862xx switches net: mdio: add unlocked mdiodev C45 bus accessors net: dsa: add tag format for MxL862xx switches dt-bindings: net: dsa: add MaxLinear MxL862xx selftests: drivers: net: hw: Modify toeplitz.c to poll for packets octeontx2-pf: Unregister devlink on probe failure net: renesas: rswitch: fix forwarding offload statemachine ionic: Rate limit unknown xcvr type messages tcp: inet6_csk_xmit() optimization tcp: populate inet->cork.fl.u.ip6 in tcp_v6_syn_recv_sock() tcp: populate inet->cork.fl.u.ip6 in tcp_v6_connect() ipv6: inet6_csk_xmit() and inet6_csk_update_pmtu() use inet->cork.fl.u.ip6 ipv6: use inet->cork.fl.u.ip6 and np->final in ip6_datagram_dst_update() ipv6: use np->final in inet6_sk_rebuild_header() ipv6: add daddr/final storage in struct ipv6_pinfo net: stmmac: qcom-ethqos: fix qcom_ethqos_serdes_powerup() ...	2026-02-11 19:31:52 -08:00
Linus Torvalds	098b6e44cb	Devicetree updates for v7.0: DT core: - Sync dtc/libfdt with upstream v1.7.2-62-ga26ef6400bd8 - Add a for_each_compatible_node_scoped() loop and convert users in cpufreq, dmaengine, clk, cdx, powerpc and Arm - Simplify of/platform.c with scoped loop helpers - Add fw_devlink tracking for "mmc-pwrseq" - Optimize fw_devlink callback code size for pinctrl-N properties - Replace strcmp_suffix() with strends() DT bindings: - Support building single binding targets - Convert google,goldfish-fb, cznic,turris-mox-rwtm, ti,prm-inst - Add bindings for Freescale AVIC, Realtek RTD1xxx system controllers, Microchip 25AA010A EEPROM, OnSemi FIN3385, IEI WT61P803 PUZZLE, Delta Electronics DPS-800-AB power supply, Infineon IR35221 Digital Multi-phase Controller, Infineon PXE1610 Digital Dual Output 6+1 VR12.5 & VR13 CPU Controller, socionext,uniphier-smpctrl, and xlnx,zynqmp-firmware - Lots of trivial binding fixes to address warnings in DTS files. These are mostly for arm64 platforms which is getting closer to be warning free. Some public shaming has helped. - Fix I2C bus node names in examples - Drop obsolete brcm,vulcan-soc binding - Drop unreferenced binding headers -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmmNLZEACgkQ+vtdtY28 YcPa+A/+Lpf1FLau//mfndvkzRUvuU5aF3eJdL1FPxfC64Js2cb9ZGSoEK+YDjaV XzNIi2Z1j+i4+uf5MTvyGaqaVx3PcQBcQtb7pu+W1pt2KiOzfVqn66EmRsY3b4cc twyOwx2sZMTOZambUfZreWwEl6uJiMowIbcLCsnVWihoiGVTnMpnV/jLcO9jISaP fe42FX9qN4NL2QqWwcREYuWMuOH7MkHDRNpEhTouWosdmFCp3PkVZcuWv3NKjGMg /tsH5X9QMr972A9s8Zk36ijvTv7NN+9t1GOtPS9KGpbwJmyPHr38mG1fsj+P0rY7 rOXRnT2PScN6kvKZuw0Rex5xeMxrQCzRkFLzyfq2LOsE0GAUyyR3qysNOdH8xO3Z 3TVMGVaelYw5T+ahie1+gf/H/t+8hGhX3teCo8ORFNYo7oLsA9qNclfd5SW2Acat pPK80PXkqTRsQ9lVGfytPZJ+m5OhcTIBdI9ieEXk/kryDAL4dHcB2IIVHM2/qm50 aGW0Kh0d61Roe0PZ5GEqI/yWPVHZroXEBxT61tDKwPyGawcq4Gs3Sftd6RXbLi8h +T6HzkHPZFlKaiLmBC1wqXnEKLd8h72qNjjDdXbRBdLXW6S5hGPtPiLv18ArlmmR 4eiFX1Tr+pUAt2W/IwZb9H84mGkbJODbI62x9k9rst/vLeHmnjs= =RE7t -----END PGP SIGNATURE----- Merge tag 'devicetree-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Sync dtc/libfdt with upstream v1.7.2-62-ga26ef6400bd8 - Add a for_each_compatible_node_scoped() loop and convert users in cpufreq, dmaengine, clk, cdx, powerpc and Arm - Simplify of/platform.c with scoped loop helpers - Add fw_devlink tracking for "mmc-pwrseq" - Optimize fw_devlink callback code size for pinctrl-N properties - Replace strcmp_suffix() with strends() DT bindings: - Support building single binding targets - Convert google,goldfish-fb, cznic,turris-mox-rwtm, ti,prm-inst - Add bindings for Freescale AVIC, Realtek RTD1xxx system controllers, Microchip 25AA010A EEPROM, OnSemi FIN3385, IEI WT61P803 PUZZLE, Delta Electronics DPS-800-AB power supply, Infineon IR35221 Digital Multi-phase Controller, Infineon PXE1610 Digital Dual Output 6+1 VR12.5 & VR13 CPU Controller, socionext,uniphier-smpctrl, and xlnx,zynqmp-firmware - Lots of trivial binding fixes to address warnings in DTS files. These are mostly for arm64 platforms which is getting closer to be warning free. Some public shaming has helped. - Fix I2C bus node names in examples - Drop obsolete brcm,vulcan-soc binding - Drop unreferenced binding headers" * tag 'devicetree-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (60 commits) dt-bindings: interrupt-controller: Add compatiblie string fsl,imx(1\|25\|27\|31\|35)-avic dt-bindings: soc: imx: add fsl,aips and fsl,emi compatible strings dt-bindings: display: bridge: lt8912b: Drop reset gpio requirement dt-bindings: firmware: fsl,scu: Mark multi-channel MU layouts as deprecated cpufreq: s5pv210: Simplify with scoped for each OF child loop dmaengine: fsl_raid: Simplify with scoped for each OF child loop clk: imx: imx31: Simplify with scoped for each OF child loop clk: imx: imx27: Simplify with scoped for each OF child loop cdx: Use mutex guard to simplify error handling cdx: Simplify with scoped for each OF child loop powerpc/wii: Simplify with scoped for each OF child loop powerpc/fsp2: Simplify with scoped for each OF child loop ARM: exynos: Simplify with scoped for each OF child loop ARM: at91: Simplify with scoped for each OF child loop of: Add for_each_compatible_node_scoped() helper dt-bindings: Fix emails with spaces or missing brackets scripts/dtc: Update to upstream version v1.7.2-62-ga26ef6400bd8 dt-bindings: crypto: inside-secure,safexcel: Mandate only ring IRQs dt-bindings: crypto: inside-secure,safexcel: Add SoC compatibles of: reserved_mem: Fix placement of __free() annotation ...	2026-02-11 18:27:08 -08:00
Linus Torvalds	d701782152	gpio updates for v7.0-rc1 GPIOLIB core: - shrink the GPIO bus driver stub code - rework software node support for "undefined" software nodes - provide and use devm_fwnode_gpiod_get_optional() - only compile the OF quirk for MT2701 when needed New drivers: - add the GPIO driver for ROHM bd72720 - add the gpio-line-mux driver providing 1-to-many mapping for a single real GPIO Driver changes: - refactor gpio-pca9570: use lock guard, add missing headers, use devres consistently - add support for a new model (G7 Aspeed sgpiom) to the aspeed-sgpio driver along with some prerequisite refactoring - use device_get_match_data() where applicable and save some lines - add support for more models to gpio-cadence - add the compatible property to reset-gpio and use it in shared GPIO management - drop unnecessary use of irqd_get_trigger_type() in gpio-max77759 - add support for a new variant to gpio-pca953x - extend build coverage with COMPILE_TEST for more drivers - constify configfs structures in gpio-sim and gpio-virtuser - add support for the K3 SoC to gpio-spacemit - implement the missing .get_direction() callback in gpio-max77620 - add support for Tegra264 to gpio-tegra186 - drop unneeded MODULE_ALIAS() from gpio-menz127 DT bindings: - document support for the opencores GPIO controller in gpio-mmio - document new variants for gpio-pca953x Documentation: - extensively describe interrupt source detection for gpio-pca953x and add more models to the list of supported variants -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEkeUTLeW1Rh17omX8BZ0uy/82hMMFAmmK9bwACgkQBZ0uy/82 hMM3rQ/7BTRmMgGiJXlDpqkUoA9fQusiEcokwgmpvlJFM3cb2ANzrjxqZDGnUVLS OFaVCPjgUTDrmWNgSSy5SBfyfVkvbXmT7X5+e38qotlNun6BKCPhF1H5HxBgJv9P ObHXZ6ACrg4Ia+jl0QkpIXUDC/vAzaBUml5LUATGHpwf/pa4ZcBDXXbLIEtEfSpb kNDDQVeWJlWxDYNuJudR8BL2saZFEoD9RaX8F4jLya8ogecoKXElK8Nj0G0Gua8D UkH9aKMlNTIrk/iE6MiohaLWWqBgRV6+wO6vd2IRek5iItTbPffk4iT2/dOiX8H4 HcOxXBxACH/+wicXGwY360r5M5BCYaMcUvLQaCxLuac2T4302aFLcrWH7be+Ju6f F+rPBRK1LTYwn0LNlu1I7hYBbwNWHCXfWejXXTH4pMO4uyiwCPpkBHXWCyjWSTuV YhIbWVYuQjVgxvPCoJ0+67ju++I2ShlXtiT6NorQrxGt9CCBzMN4KU/uMPkN5j+Z RgurHuEEB1hZ8h5Tzs058L6Pxfyp4eY6Qy8BKLPcrGZaKvvX/EZeI/JkeQOOItKe VoVq4NIeeqYmqzFa5xrsRYnGUw6lKVj2M5SrjRfbGRz4xVX+rSgrBZMrz1gJyisP 1M5LiGj+c91oo41tysJdPjkc8dkN47hFbNLzB27kXDfm77qlbUE= =Zhuy -----END PGP SIGNATURE----- Merge tag 'gpio-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio updates from Bartosz Golaszewski: "There are two new drivers and some changes to GPIO core but mostly just GPIO driver updates across a wide array of files, adding support for new models as well as various refactoring changes. Nothing controversial and everything has spent a good measure of time in linux-next. GPIOLIB core: - shrink the GPIO bus driver stub code - rework software node support for "undefined" software nodes - provide and use devm_fwnode_gpiod_get_optional() - only compile the OF quirk for MT2701 when needed New drivers: - add the GPIO driver for ROHM bd72720 - add the gpio-line-mux driver providing 1-to-many mapping for a single real GPIO Driver changes: - refactor gpio-pca9570: use lock guard, add missing headers, use devres consistently - add support for a new model (G7 Aspeed sgpiom) to the aspeed-sgpio driver along with some prerequisite refactoring - use device_get_match_data() where applicable and save some lines - add support for more models to gpio-cadence - add the compatible property to reset-gpio and use it in shared GPIO management - drop unnecessary use of irqd_get_trigger_type() in gpio-max77759 - add support for a new variant to gpio-pca953x - extend build coverage with COMPILE_TEST for more drivers - constify configfs structures in gpio-sim and gpio-virtuser - add support for the K3 SoC to gpio-spacemit - implement the missing .get_direction() callback in gpio-max77620 - add support for Tegra264 to gpio-tegra186 - drop unneeded MODULE_ALIAS() from gpio-menz127 DT bindings: - document support for the opencores GPIO controller in gpio-mmio - document new variants for gpio-pca953x Documentation: - extensively describe interrupt source detection for gpio-pca953x and add more models to the list of supported variants" * tag 'gpio-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (59 commits) gpio: tegra186: Add support for Tegra264 dt-bindings: gpio: Add Tegra264 support gpio: spacemit-k1: Use PDR for pin direction, not SDR/CDR gpio: max77620: Implement .get_direction() callback gpio: aspeed-sgpio: Support G7 Aspeed sgpiom controller dt-bindings: gpio: aspeed,sgpio: Support ast2700 gpio: aspeed-sgpio: Convert IRQ functions to use llops callbacks gpio: aspeed-sgpio: Create llops to handle hardware access gpio: aspeed-sgpio: Remove unused bank name field gpio: aspeed-sgpio: Change the macro to support deferred probe regulator: bd71815: switch to devm_fwnode_gpiod_get_optional gpiolib: introduce devm_fwnode_gpiod_get_optional() wrapper gpio: mmio: Add compatible for opencores GPIO dt-bindings: gpio-mmio: Correct opencores GPIO gpio: pca9570: use lock guards gpio: pca9570: Don't use "proxy" headers gpio: pca9570: Use devm_mutex_init() for mutex initialization MAINTAINERS: Add ROHM BD72720 PMIC power: supply: bd71828-power: Support ROHM BD72720 power: supply: bd71828: Support wider register addresses ...	2026-02-11 10:53:39 -08:00
Linus Torvalds	f6c42489fe	regulator: Updates for v7.0 There's a bunch of new drivers here, plus a lot of hardening for the supply resolution code which allow us to support systems where we have two PMICs each of which has regulators supplied by the other. This did work a long time ago but got broken as part of improved integration with the device model, it's fairly rare so nobody noticed. - Improvements for supply handling from André Draszik to allow systems with two PMICs with supply/consumer relationships in both directions to instantiate. - New drivers for Maxim MAX776750, Realtek RT8902, Samsung S2MPG11, Texas Instuments TPS65185. This have also pulls in some MFD updates which are build dependencies for the Samsung S2MPG11 support. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmmJ8RMACgkQJNaLcl1U h9D42Af/Xw+osom1EXqU1IDuxuKQXKE9GXvHJ+OV2uWaPJE8qy5q1ZNJ38HyMBRW cuFxfPlUJA/xR47WSvK7LVkHutZVMBIohkhahueP218fDVoQmlxSChcbM8VBzoHW NJ3TY+rzhHN5O7r00rPfUuxdQwjkGha122xGsxmzzfXUYpKOZ1jxSInR8BibIAc/ 0fmz61OAgpgBXMX+dTZvD8usVW4vzCvaYWX0CfdaViDuz72kZn8I1iFWzxQEDS7W /KGq7WLkyG5x2wzZ6kySKjeq4nWKR1lURMU0KJ6bjW9U/RN3PCpZREJjWNLlUUGJ ApltpBz5fXJ+tt6/IonwVL6YwjRXpw== =vcqU -----END PGP SIGNATURE----- Merge tag 'regulator-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator Pull regulator updates from Mark Brown: "There's a bunch of new drivers here, plus a lot of hardening for the supply resolution code which allow us to support systems where we have two PMICs each of which has regulators supplied by the other. This did work a long time ago but got broken as part of improved integration with the device model, it's fairly rare so nobody noticed. - Improvements for supply handling from André Draszik to allow systems with two PMICs with supply/consumer relationships in both directions to instantiate. - New drivers for Maxim MAX776750, Realtek RT8902, Samsung S2MPG11, Texas Instuments TPS65185. This have also pulls in some MFD updates which are build dependencies for the Samsung S2MPG11 support" * tag 'regulator-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (42 commits) regulator: s2mps11: more descriptive gpio consumer name regulator: s2mps11: add S2MPG11 regulator regulator: s2mps11: refactor S2MPG10 regulator macros for S2MPG11 reuse regulator: s2mps11: refactor S2MPG10 ::set_voltage_time() for S2MPG11 reuse regulator: s2mps11: add S2MPG10 regulator regulator: s2mps11: refactor handling of external rail control regulator: s2mps11: update node parsing (allow -supply properties) regulator: s2mps11: place constants on right side of comparison tests regulator: s2mps11: use dev_err_probe() where appropriate regulator: s2mps11: drop two needless variable initialisations regulator: add REGULATOR_LINEAR_VRANGE macro regulator: dt-bindings: add s2mpg11-pmic regulators regulator: dt-bindings: add s2mpg10-pmic regulators dt-bindings: firmware: google,gs101-acpm-ipc: convert regulators to lowercase mfd: sec: Add support for S2MPG11 PMIC via ACPM mfd: sec: s2mpg10: Reorder regulators for better probe performance dt-bindings: mfd: Add samsung,s2mpg11-pmic dt-bindings: mfd: samsung,s2mpg10-pmic: Link to its regulators dt-bindings: mfd: samsung,s2mps11: Split s2mpg10-pmic into separate file mfd: sec: Drop now unused struct sec_pmic_dev::irq_data ...	2026-02-11 09:40:12 -08:00
Linus Torvalds	6589b3d76d	soc: devicetree updates for 7.0 There are a handful of new SoCs this time, all of these are more or less related to chips in a wider family: - SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first widely available RVA23 implementation. Note that this is entirely unrelated with the similarly named Texas Instruments K3 chip family that follwed the TI Keystone2 SoC. - The Realtek Kent family of SoCs contains three chip models rtd1501s, rtd1861b and rtd1920s, and is related to their earlier Set-top-box and NAS products such as rtd1619, but is built on newer Arm Cortex-A78 cores. - The Qualcomm Milos family includes the Snapdragon 7s Gen 3 (SM7635) mobile phone SoC built around Armv9 Kryo cores of the Arm Cortex-A720 generation. This one is used in the Fairphone Gen 6 - Qualcomm Kaanapali is a new SoC based around eight high performance Oryon CPU cores - NXP i.MX8QP and i.MX952 are both feature reduced versions of chips we already support, i.e. the i.MX8QM and i.MX952, with fewer CPU cores and I/O interfaces. As part of a cleanup, a number of SoC specific devicetree files got removed because they did not have a single board using the .dtsi files and they were never compile tested as a result: Samsung s3c6400, ST spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/ r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI am3703/am3715. All of these could be restored easily if a new board gets merged. Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only machine, as all remaining users are assumed to be using ACPI based firmware. A relatively small number of 43 boards get added this time, and almost all of them for arm64. Aside from the reference boards for the newly added SoCs, this includes: - Three server boards use 32-bit ASpeed BMCs - One more reference board for 32-bit Microchip LAN9668 - 64-bit Arm single-board computers based on Amlogic s905y4, CIX sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95, Qualcomm qcs6490/qrb2210 and Rockchip rk3568/rk3588s - Carrier board for SOMs using Intel agilex5, Marvell Armada 7020, NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588 - Two mobile phones using Snapdragon 845 - A gaming device and a NAS box, both based on Rockchips rk356x On top of the newly added boards and SoCs, there is a lot of background activity going into cleanups, in particular towards getting a warning-free dtc build, and the usual work on adding support for more hardware on the previously added machines. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmmLSTIACgkQmmx57+YA GNk6xw//bn239Nn6XUSrmm3b7SGDf+9AvdrukrUEOsIYBYUM7fkulVSINpVOSzZU DAxLSCY1qfE9zP4x+hrYv922w9Rt19zPuEwFVCslbbTk9NN8IhmhIOs06o2jrvN3 HS/AcESV2SCUe0EVjDIdBgisKMGdbN2t8bdrFFOmqUkQ+7EJ2GvNL0MoaKrdF+Sr ilt5Hhkl6ixbGDq2KEB2QQHQhYKa/5GdKS0CLTY4et/dZbjHVg9o6/sfgIhLINCz wNb9CKnt1Gv5L3RWW2LxQrrNe5qhLmHq1vmPbxSJGrzqnOwY9Tcg4s1Io9EcDtyW LZlq4PkLJV9oPVHgi0mygZ3ONVhWhCMVhTXg6Osi1aHJeEERuIaYMfeU7WD0jHv8 ZcGboxfyiQmphRJumL0C74uIuuXgdoKrv7gqQvo9dy+HRxdHW/7p8TQi9SSfh7kF Iysc2ePMmqLd4WJCMxV+7FrT8oZxOL+/KfisCu6n/Qdv65kTWmBlLCK6XZrmWYyk YKg48F8xpQaSmgevWePwhcH0a/TmgmoT+6xOfTuyo88k65FLXXmrFp14th2Kg5sI 60W9ur6ujPI3s19H9C3IQp7ub5Ermvj+g893zEB1e2CR9blfqRARV9zFSv4OMkq+ hQmqe5cU9/17k7wchFke4Y/FsS8W2oFFJ9o6czOTnh5NhlpVSJw= =IK23 -----END PGP SIGNATURE----- Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC devicetree updates from Arnd Bergmann: "There are a handful of new SoCs this time, all of these are more or less related to chips in a wider family: - SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first widely available RVA23 implementation. Note that this is entirely unrelated with the similarly named Texas Instruments K3 chip family that follwed the TI Keystone2 SoC. - The Realtek Kent family of SoCs contains three chip models rtd1501s, rtd1861b and rtd1920s, and is related to their earlier Set-top-box and NAS products such as rtd1619, but is built on newer Arm Cortex-A78 cores. - The Qualcomm Milos family includes the Snapdragon 7s Gen 3 (SM7635) mobile phone SoC built around Armv9 Kryo cores of the Arm Cortex-A720 generation. This one is used in the Fairphone Gen 6 - Qualcomm Kaanapali is a new SoC based around eight high performance Oryon CPU cores - NXP i.MX8QP and i.MX952 are both feature reduced versions of chips we already support, i.e. the i.MX8QM and i.MX952, with fewer CPU cores and I/O interfaces. As part of a cleanup, a number of SoC specific devicetree files got removed because they did not have a single board using the .dtsi files and they were never compile tested as a result: Samsung s3c6400, ST spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/ r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI am3703/am3715. All of these could be restored easily if a new board gets merged. Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only machine, as all remaining users are assumed to be using ACPI based firmware. A relatively small number of 43 boards get added this time, and almost all of them for arm64. Aside from the reference boards for the newly added SoCs, this includes: - Three server boards use 32-bit ASpeed BMCs - One more reference board for 32-bit Microchip LAN9668 - 64-bit Arm single-board computers based on Amlogic s905y4, CIX sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95, Qualcomm qcs6490/qrb2210 and Rockchip rk3568/rk3588s - Carrier board for SOMs using Intel agilex5, Marvell Armada 7020, NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588 - Two mobile phones using Snapdragon 845 - A gaming device and a NAS box, both based on Rockchips rk356x On top of the newly added boards and SoCs, there is a lot of background activity going into cleanups, in particular towards getting a warning-free dtc build, and the usual work on adding support for more hardware on the previously added machines" * tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (757 commits) dt-bindings: intel: Add Agilex eMMC support arm64: dts: socfpga: agilex: add emmc support arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node ARM: dts: socfpga: fix dtbs_check warning for fpga-region ARM: dts: socfpga: add #address-cells and #size-cells for sram node dt-bindings: altera: document syscon as fallback for sys-mgr arm64: dts: altera: Use lowercase hex dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes arm64: dts: socfpga: agilex5: add support for modular board dt-bindings: intel: Add Agilex5 SoCFPGA modular board arm64: dts: socfpga: agilex5: Add dma-coherent property arm64: dts: realtek: Add Kent SoC and EVB device trees dt-bindings: arm: realtek: Add Kent Soc family compatibles ARM: dts: samsung: Drop s3c6400.dtsi ARM: dts: nuvoton: Minor whitespace cleanup MAINTAINERS: Add Falcon DB arm64: dts: a7k: add COM Express boards ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi arm64: dts: rockchip: Fix rk3588 PCIe range mappings ...	2026-02-10 21:11:08 -08:00
Linus Torvalds	bdbddf72a2	soc: driver updates for 7.0 There are are a number of to firmware drivers, in particular the TEE subsystem: - a bus callback for TEE firmware that device drivers can register to - sysfs support for tee firmware information - minor updates to platform specific TEE drivers for AMD, NXP, Qualcomm and the generic optee driver - ARM SCMI firmware refactoring to improve the protocol discover among other fixes and cleanups - ARM FF-A firmware interoperability improvements The reset controller and memory controller subsystems gain support for additional hardware platforms from Mediatek, Renesas, NXP, Canaan and SpacemiT. Most of the other changes are for random drivers/soc code. Among a number of cleanups and newly added hardware support, including: - Mediatek MT8196 DVFS power management and mailbox support - Qualcomm SCM firmware and MDT loader refactoring, as part of the new Glymur platform support. - NXP i.MX9 System Manager firmware support for accessing the syslog - Minor updates for TI, Renesas, Samsung, Apple, Marvell and AMD SoCs. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmmLWqkACgkQmmx57+YA GNmbPRAAt4qSMkLvVjGkjjuI3phIjEk9oCNBWDNRUtwdTpnP97cbFXI0jVo2vG7X aKatSjHeqYe66QT1YFW+JXjJiPXQxtlZtquHomcShHQRd/fS34A1ip9l0sR/RbFV qP8qMBWWlyND0DsUcE7ymRX/j74yOobdcjG/vG48X81wFxxFOHoNSwItRx5zIq+6 3KenZMoP6+uEQk4uq1USpr0mYAoIUPl0opV9UCjVUSzmYdYW2l/pJWlIqFuj8QZ7 X09qQg070GtYMSOwZfPwvSeV01tEZevIDW7ZF6tJuUNiHE8QMOUoNEWXj1L7hhOY PUWfDJSKenzzqhMZzM0Vbds/MtGkG7BtCGjJc6zGTaDtO4ucBZcF3tL2KA5k6kp1 9domNvrAT4HGPC1DeWYYRf5RWe63253ev+UDFgEHIwdxj5jE9q9YrnRNvuKvTHcZ FTYIiBakSMwnjVQt5x9Cm3F1JuQ7LpIN2Fkrq3AY3m85+mHnjdSWVN8jCB9Ko3xX 91ONHnxVyC2bU47yVmLXugWO1MhNeNKuZFKcgqlGImeBixEhT43P8j9b3NeMTVyA P5iVMZw9om/3XtF5hVHz5ABHlOcFCY5QcKsSJZ9PMyPnjUyzg7Ige7pkZZknNJnb wcYDQr/sEn83WU6uRRLm3qDbWmGR5tYFcgYYa9U4e8tsO7ZXaqw= =rUYH -----END PGP SIGNATURE----- Merge tag 'soc-drivers-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "There are are a number of to firmware drivers, in particular the TEE subsystem: - a bus callback for TEE firmware that device drivers can register to - sysfs support for tee firmware information - minor updates to platform specific TEE drivers for AMD, NXP, Qualcomm and the generic optee driver - ARM SCMI firmware refactoring to improve the protocol discover among other fixes and cleanups - ARM FF-A firmware interoperability improvements The reset controller and memory controller subsystems gain support for additional hardware platforms from Mediatek, Renesas, NXP, Canaan and SpacemiT. Most of the other changes are for random drivers/soc code. Among a number of cleanups and newly added hardware support, including: - Mediatek MT8196 DVFS power management and mailbox support - Qualcomm SCM firmware and MDT loader refactoring, as part of the new Glymur platform support. - NXP i.MX9 System Manager firmware support for accessing the syslog - Minor updates for TI, Renesas, Samsung, Apple, Marvell and AMD SoCs" * tag 'soc-drivers-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (171 commits) bus: fsl-mc: fix an error handling in fsl_mc_device_add() reset: spacemit: Add SpacemiT K3 reset driver reset: spacemit: Extract common K1 reset code reset: Create subdirectory for SpacemiT drivers dt-bindings: soc: spacemit: Add K3 reset support and IDs reset: canaan: k230: drop OF dependency and enable by default reset: rzg2l-usbphy-ctrl: Add suspend/resume support reset: rzg2l-usbphy-ctrl: Propagate the return value of regmap_field_update_bits() reset: gpio: check the return value of gpiod_set_value_cansleep() reset: imx8mp-audiomix: Support i.MX8ULP SIM LPAV reset: imx8mp-audiomix: Extend the driver usage reset: imx8mp-audiomix: Switch to using regmap API reset: imx8mp-audiomix: Drop unneeded macros soc: fsl: qe: qe_ports_ic: Consolidate chained IRQ handler install/remove soc: mediatek: mtk-cmdq: Add mminfra_offset adjustment for DRAM addresses soc: mediatek: mtk-cmdq: Extend cmdq_pkt_write API for SoCs without subsys ID soc: mediatek: mtk-cmdq: Add pa_base parsing for hardware without subsys ID support soc: mediatek: mtk-cmdq: Add cmdq_get_mbox_priv() in cmdq_pkt_create() mailbox: mtk-cmdq: Add driver data to support for MT8196 mailbox: mtk-cmdq: Add mminfra_offset configuration for DRAM transaction ...	2026-02-10 20:45:30 -08:00
Linus Torvalds	0506158ac7	Thermal control updates for 6.20-rc1/7.0-rc1 - Add Panther Lake, Wildcat Lake and Nova Lake processor IDs to the list of supported processors in the intel_tcc_cooling thermal driver (Srinivas Pandruvada) - Drop unnecessary explicit driver data clearing on removal from the intel_pch_thermal driver (Kaushlendra Kumar) - Add support for "slow" workload type hints to the int340x processor_thermal driver and enable it on the Panther Lake platform (Srinivas Pandruvada) - Use sysfs_emit{_at}() in sysfs show functions in Intel thermal drivers (Thorsten Blum) - Update the x86_pkg_temp_thermal driver to handle THERMAL_TEMP_INVALID that can be passed to it via sysfs as expected (Rafael Wysocki) - Drop a redundant local variable from the intel_tcc_cooling thermal driver and fix a kerneldoc comment typo in the TCC library (Sumeet Pawnikar) - Fix CFLAGS and LDFLAGS in the pkg-config libthermal template (Romain Gantois) - Support multiple temp to raw conversion functions in the Mediatek LVTS thermal driver and add MT8196 and MT6991 support to it (Laura Nao) - Add Mediatek LVTS driver support for MT7987 (Frank Wunderlich) - Use the existing HZ_PER_MHZ macro on STM32 (Andy Shevchenko) - Use the existing clamp() macro on BCM2835 (Thorsten Blum) - Make the reset line optional in order to support new Renesas SoCs where it is not available and add support for RZ/T2H and RZ/N2H to the rzg3e thermal driver (Cosmin Tanislav) - Document RZ/V2N TSU in the r9a09g047-tsu DT bindings (Ovidiu Panait) - Fix all kernel-doc warnings in the internal thermal core header file (Randy Dunlap) - Fix a device node reference leak in thermal_of_cm_lookup() (Felix Gu) - Replace some old-style library function calls with ones that are currently recommended in several places in the thermal core and debugfs code (Sumeet Pawnikar, Thorsten Blum) -----BEGIN PGP SIGNATURE----- iQFGBAABCAAwFiEEcM8Aw/RY0dgsiRUR7l+9nS/U47UFAmmDnCoSHHJqd0Byand5 c29ja2kubmV0AAoJEO5fvZ0v1OO1lyoIAJ5gQviWP4gmifh/osuBbc6EdN5qBnwL d6oj6oKoTKYC8TCzgIVNf4sOU9BziJgiuB5WSUDqFG6MPy+C/kSztlZ3yVQDpJzW XgGdgLMK/Sdza6IE8+AfHN3WeYTA4BD7Otda1L965FAY8PN1W4ZzzZyydWHd27Gt 4D9ruuCFZQ52EatMtbtpAX+loapIIFD3jUZ6fxBK1ziAN3en2F57xC4GeJvbS9fz zpBJld+p19CdfTd/NCHMdqVTc01fL0d6cwnpzdH+aeqmam61SYAzLQrk0Wu3wlfr m8jqx+F7qL9/X/CUSOoy50K7pBQimUAh80L7YPBV+/gwpW3IO4Ll3KU= =AqXf -----END PGP SIGNATURE----- Merge tag 'thermal-6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull thermal control updates from Rafael Wysocki: "These add support for "slow" (long-term trend) workload type hints to the Intel int340x thermal driver and selftests (and enable it for Panther Lake), add support for MT8196 along with DT bindings and for MT7987 to the Mediatek LVTS thermal driver, add support for RZ/T2H and RZ/N2H along with DT bindings to the Renesas rzg3e thermal driver, add support for the Panther Lake, Wildcat Lake and Nova Lake processors to the intel_tcc_cooling driver, fix bugs, make some cosmetic changes including code cleanups and library function substitutions, and update documentation. Specifics: - Add Panther Lake, Wildcat Lake and Nova Lake processor IDs to the list of supported processors in the intel_tcc_cooling thermal driver (Srinivas Pandruvada) - Drop unnecessary explicit driver data clearing on removal from the intel_pch_thermal driver (Kaushlendra Kumar) - Add support for "slow" workload type hints to the int340x processor_thermal driver and enable it on the Panther Lake platform (Srinivas Pandruvada) - Use sysfs_emit{_at}() in sysfs show functions in Intel thermal drivers (Thorsten Blum) - Update the x86_pkg_temp_thermal driver to handle THERMAL_TEMP_INVALID that can be passed to it via sysfs as expected (Rafael Wysocki) - Drop a redundant local variable from the intel_tcc_cooling thermal driver and fix a kerneldoc comment typo in the TCC library (Sumeet Pawnikar) - Fix CFLAGS and LDFLAGS in the pkg-config libthermal template (Romain Gantois) - Support multiple temp to raw conversion functions in the Mediatek LVTS thermal driver and add MT8196 and MT6991 support to it (Laura Nao) - Add Mediatek LVTS driver support for MT7987 (Frank Wunderlich) - Use the existing HZ_PER_MHZ macro on STM32 (Andy Shevchenko) - Use the existing clamp() macro on BCM2835 (Thorsten Blum) - Make the reset line optional in order to support new Renesas SoCs where it is not available and add support for RZ/T2H and RZ/N2H to the rzg3e thermal driver (Cosmin Tanislav) - Document RZ/V2N TSU in the r9a09g047-tsu DT bindings (Ovidiu Panait) - Fix all kernel-doc warnings in the internal thermal core header file (Randy Dunlap) - Fix a device node reference leak in thermal_of_cm_lookup() (Felix Gu) - Replace some old-style library function calls with ones that are currently recommended in several places in the thermal core and debugfs code (Sumeet Pawnikar, Thorsten Blum) * tag 'thermal-6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (34 commits) drivers: thermal: intel: tcc_cooling: Drop redundant local variable thermal/of: Fix reference leak in thermal_of_cm_lookup() thermal: core: thermal_core.h: fix all kernel-doc warnings thermal: intel: x86_pkg_temp_thermal: Handle invalid temperature thermal: renesas: rzg3e: add support for RZ/T2H and RZ/N2H dt-bindings: thermal: r9a09g047-tsu: document RZ/T2H and RZ/N2H thermal: renesas: rzg3e: make calibration value retrieval per-chip thermal: renesas: rzg3e: make min and max temperature per-chip thermal: renesas: rzg3e: make reset optional dt-bindings: thermal: r9a09g047-tsu: Document RZ/V2N TSU thermal/drivers/broadcom: Use clamp to simplify bcm2835_thermal_temp2adc thermal/drivers/stm32: Use predefined HZ_PER_MHZ instead of a custom one thermal/drivers/mediatek/lvts_thermal: Add mt7987 support dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT7987 dt-bindings: nvmem: mediatek: efuse: Add support for MT8196 thermal/drivers/mediatek/lvts_thermal: Add MT8196 support thermal/drivers/mediatek/lvts: Support MSR offset for 16-bit calibration data thermal/drivers/mediatek/lvts: Add support for ATP mode thermal/drivers/mediatek/lvts: Add lvts_temp_to_raw variant thermal/drivers/mediatek/lvts: Add platform ops to support alternative conversion logic ...	2026-02-09 19:33:44 -08:00
André Draszik	030158c052	regulator: dt-bindings: add s2mpg11-pmic regulators The S2MPG11 PMIC is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, NTC thermistor inputs, and additional GPIO interfaces. It typically complements an S2MPG10 PMIC in a main/sub configuration as the sub-PMIC. S2MPG11 has 12 buck, 1 buck-boost, and 15 LDO rails. Several of these can either be controlled via software (register writes) or via external signals, in particular by: * one out of several input pins connected to a main processor's: * GPIO pins * other pins that are e.g. firmware- or power-domain-controlled without explicit driver intervention * a combination of input pins and register writes. Control via input pins allows PMIC rails to be controlled by firmware, e.g. during standby/suspend, or as part of power domain handling where otherwise that would not be possible. Additionally toggling a pin is faster than register writes, and it also allows the PMIC to ensure that any necessary timing requirements between rails are respected automatically if multiple rails are to be enabled or disabled quasi simultaneously. While external control via input pins appears to exist on other versions of this PMIC, there is more flexibility in this version, in particular there is a selection of input pins to choose from for each rail (which must therefore be configured accordingly if in use), whereas other versions don't have this flexibility. Add documentation related to the regulator (buck & ldo) parts like devicetree definitions, regulator naming patterns, and additional properties. Since S2MPG11 is typically used as the sub-PMIC together with an S2MPG10 as the main-PMIC, the datasheet and the binding both suffix the rails with an 's'. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-3-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>	2026-02-04 13:35:31 +00:00
André Draszik	71bc6adae4	regulator: dt-bindings: add s2mpg10-pmic regulators The S2MPG10 PMIC is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, RTC, clock outputs, and additional GPIO interfaces. It has 10 buck and 31 LDO rails. Several of these can either be controlled via software (register writes) or via external signals, in particular by: * one out of several input pins connected to a main processor's: * GPIO pins * other pins that are e.g. firmware- or power-domain-controlled without explicit driver intervention * a combination of input pins and register writes. Control via input pins allows PMIC rails to be controlled by firmware, e.g. during standby/suspend, or as part of power domain handling where otherwise that would not be possible. Additionally toggling a pin is faster than register writes, and it also allows the PMIC to ensure that any necessary timing requirements between rails are respected automatically if multiple rails are to be enabled or disabled quasi simultaneously. While external control via input pins appears to exist on other versions of this PMIC, there is more flexibility in this version, in particular there is a selection of input pins to choose from for each rail (which must therefore be configured accordingly if in use), whereas other versions don't have this flexibility. Add documentation related to the regulator (buck & ldo) parts like devicetree definitions, regulator naming patterns, and additional properties. S2MPG10 is typically used as the main-PMIC together with an S2MPG11 PMIC in a main/sub configuration, hence the datasheet and the binding both suffix the rails with an 'm'. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-2-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>	2026-02-04 13:35:30 +00:00
Jammy Huang	2ad2d0e291	dt-bindings: clock: aspeed: Add VIDEO reset definition ASPEED clock controller provides a couple of resets. Add the define of video to allow referring to it. Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2026-02-03 21:37:05 -08:00
Rob Herring (Arm)	ff7e082ea4	dt-bindings: Remove unused includes Remove includes which are not referenced by either DTS files or drivers. There's a few more which are new, so they are excluded for now. Reviewed-by: Linus Walleij <linusw@kernel.org> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251212231203.727227-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>	2026-02-03 20:58:09 -06:00
Greg Kroah-Hartman	96657eb5ab	interconnect changes for 6.20 This pull request contains the interconnect changes for the 6.20-rc1 merge window. The core and driver changes are listed below. Core changes: - Add KUnit tests for core functionality Driver changes: - New driver for MediaTek MT8196 EMI - MediaTek driver fixes - Support for Glymur BWMONs - QCS8300 driver topology fix - Misc cleanups Signed-off-by: Georgi Djakov <djakov@kernel.org> -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEExQ4tCsdmOu34XfMFgNDMCsbYFmMFAml8pNoACgkQgNDMCsbY FmOG6xAApKmTbvk1W5bI3D/kMDf0vqEQ57tZzstjVOorLhBffJcZ/FT4Yi0cYmoe LGYuC4o2qgm4zSI88QyFUrQdCNDJFxJX9XTlTw3rWckleW50mk7X3KxJ7O3U8JiF jOrS7vFZG7+NaoGI8hzkKNO6GcgpJdamyb0K4mxMfsqisKJVbHqgtb0jtTpqbWX3 dJd9Ok7rEFhUshA19xdjHb8XfhLQzFKLhfhnzudU49AX9ZHgpsHKqlXhwQJqYyWm TpM8vtpcwo4M0FHxqyR4AAt7U7TAOIMrL9QR3j+Oh7GHTROYnErdmQYAk7Bl39Wt TAVeNKSMQvvepUpk8u4kyHn4/r+721jgDDwm8s2cPepv+0ggoR7LzdewAJaO9j1I 7huKR38OLrlhF1805YJXGA6L3vblbaxbML9mF40GD6fPPP18yCeWJojG2sZrj98n ayz/VJEU1tvrzK9EvoCsw/451HbEx8Q0PiJjcbOYwOs/yD5WZ2AbmG2PQsh4aUMS x9Dqfqv7oIXDNQ0FKMPGo5odsQgo0h+7Yy+xrDxOXKOb+4YW53D9zxfuwLo4drMX gaXjxyNW4Hv4gp7hcvpNT7woN7qmoPUhullYZVvbU2RWGalvvh2RA+EK/w50ysSn /sRZP/Kgu+j4Q06CELMFTldhRIav0v8GyUa3clmSZ5Kf60H8ChM= =gAyf -----END PGP SIGNATURE----- Merge tag 'icc-6.20-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 6.20 This pull request contains the interconnect changes for the 6.20-rc1 merge window. The core and driver changes are listed below. Core changes: - Add KUnit tests for core functionality Driver changes: - New driver for MediaTek MT8196 EMI - MediaTek driver fixes - Support for Glymur BWMONs - QCS8300 driver topology fix - Misc cleanups Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.20-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc: interconnect: qcom: msm8974: drop duplicated RPM_BUS_{MASTER,SLAVE}_REQ defines interconnect: qcom: smd-rpm: drop duplicated QCOM_RPM_SMD_KEY_RATE define dt-bindings: interconnect: qcom-bwmon: Document Glymur BWMONs interconnect: qcom: qcs8300: fix the num_links for nsp icc node interconnect: Add kunit tests for core functionality dt-bindings: interconnect: qcom,qcs615-rpmh: Drop IPA interconnects interconnect: mediatek: Aggregate bandwidth with saturating add interconnect: mediatek: Don't hijack parent device interconnect: mediatek: Add support for MediaTek MT8196 EMI ICC dt-bindings: interconnect: mt8183-emi: Add support for MT8196 EMI	2026-01-30 16:46:45 +01:00
Prathamesh Shete	b565717e1d	dt-bindings: gpio: Add Tegra264 support Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra264. The number of pins is slightly different, but the programming model remains the same. Add a new header, include/dt-bindings/gpio/nvidia,tegra264-gpio.h, that defines port IDs as well as the TEGRA264_MAIN_GPIO() helper, both of which are used in conjunction to create a unique specifier for each pin. On Tegra, GPIO wake events are latched and routed via the PMC. Document the standard DT property, wakeup-parent, which is a phandle to the PMC interrupt controller that provides the parent wake interrupt domain for the GPIO controller. If the property is absent the driver falls back to a compatible-based lookup. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260128085114.1137725-1-pshete@nvidia.com [Bartosz: fixed whitespace errors] Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>	2026-01-29 09:30:54 +01:00
Arnd Bergmann	c8f7de01d9	Samsung DTS ARM64 changes for v6.20, part two Add DPU clock management unit nodes to Google GS101. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmlx4t4QHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1556EACSVx9fbk3LlULtLAtOk355gsQCLteY6cTz 9sCOCErGe7szk0jtV3bk4vrKg/ONwM6g5hUOfrZlMcHuQZdjd6PHNKdQLX5+RKWc 2mA1AKy2p1LfrVUyka7fiaEU4xYEHdb8IUamM7aHjBhIp+5+t6YMvrCuOcd1/QYK sOwCP8sT+mVQJnpu+k26XoBMulZfB1HGWL43fk80y94GhQX6nLMdHrSdlO+SShaa jTBD3YHfllmlUQdmAVeSJiMy02goivnjoanPFG32j+4Cn+KD/8w+yz/aMtrBynvS Pwdo2jX6F8J3GsaoqFkutps7zGEPEFDeoaFQgcoD/mWng3iHfluHIKOoFLGTe59W AkSngskkHhUPQGUSYpRap5N3CYmBjtBliks5FlSChqaz1baP+YXmIFz2uquEm0R+ yNo8Jpx4hSH7+YzRNPshLRIkkkhJKPDCMj8umPC+Of+aA6KTeijHV+uhWygsLjqG LmpWWwLMIWzX0yTtW7aKZ7oxzekB+sUVb5A87QtnM18zbINDX1q+zxdKF4iMvfqn DndeJOpfDu8b13aZ8MEPUuXmGk6aYQwP4dhfv0dc76yToms2VKNLywic+qQsnB95 td83D2KXY2WYmU7jTJtw+4ivkhD4KgEAg/5n1fIhv0IT7VrZmumBZdfhr5lDLLYV DLoyuh6qzQ== =LRtY -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6SUAACgkQmmx57+YA GNkLgBAAqj9l8kZW222GMkdwO0GxoPRPG+IQdQMLD/Z7y7d2NLajpzMhxQnMkkN/ HdNFRlEercKQ3OWuilnHbw7hrx61LSbmiVOWiDZRrmI9Wxh7YBSjRFx1WKzk/EZa P9LjLd9A2NXRxcCnA/QT54BKJHtgHnaI7uzYTHwFEUcGu9hHgh9dm6LXuQCweGeL 0RirrXJ1cylnLgIM09NwwTcFRobpElWbMGMy45+hw6HSlpWNDCaob0KvfkE+J84c Pj8OHb9+NILaZhuMEEtnWzymxu9Al8s9TPIFUsv/rx4r5S7kS9klZJqISrwWRc5G e+7rHo8QgTM6j4S4tal99XeNAEm/I+l/2D2GoB8xxB2vpiyhdXbRkqzGxNBw9Ras jRtC+ykQGG5i9d1DLzA6SGpglrYU0MYZKvTDDSOLGmHtDpP0ttgnhNpaWA5jHD6t zLmnHbwpFrTLIF43BHeSlMf7s3wtY1jlCQqtKj/egxyAgooBj12Krc0IDug3cebV nJv9eG9dkrO1KQn4Eeds85gsGaZs2Is0e03C2nyU9isoNqKyFLWeSPgZHGii1FSC S6msWCPfo9Yhiypq5/Dpnd29FN7dekpOp1qVSHuPyhNDbPHcIB8ROPO+Wv1Zsuur hlljRvYKQzDj7NzysR9xyRnvkIOI3FJRxy+m0BdtN0zOe7LxkwM= =2Af+ -----END PGP SIGNATURE----- Merge tag 'samsung-dt64-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM64 changes for v6.20, part two Add DPU clock management unit nodes to Google GS101. * tag 'samsung-dt64-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: gs101: add cmu_dpu and sysreg_dpu dt nodes dt-bindings: clock: google,gs101-clock: Add DPU clock management unit dt-bindings: clock: google,gs101-clock: fix alphanumeric ordering Signed-off-by: Arnd Bergmann <arnd@arndb.de>	2026-01-28 18:36:57 +01:00
Arnd Bergmann	43b1d60361	Qualcomm Arm64 DeviceTree for v6.20 Introduce the Kaanapali SoC, with the MTP and QRD devices. Introduce support for the Milos SoC (SM7635) and initial support for the Fairphone (Gen 6) device on this platform. Add the QCS6490-based RubikPI3 board, the QRB2210-based Arduino UnoQ, the X Elite-based Medion SPRCHRGD 14 S1 and Surface Pro 11 laptops, and the SDM845-based Pixel 3 and Pixel 3 XL devices. On the Kodiak-based (QCS6490) RB3Gen2 the TC9563 PCIe switch controller is described. On Lemans (SA8775P/QCS9075) the GPU and crypto blocks are added. IO-regions and clocks are added to interconnect nodes to allow QoS configuration. GPU, TPM and USB support are enabled on the evaluation kit (EVK). On Monaco (QCS8300) the two PCIe controllers, the camera subsystem, tsens, display subsystem, crypto, CPUfreq, and coresight are added. On the evaluation kit (EVK) the PCIe busses are enabled, together with an AMC6821-based fan controller and the ST33 TPM chip. On MSM8939 the camera subsystem is described. The Asus ZenFone 2 Laser/Selfie gains battery and hall sensor support. On the Agatti-based RB1 board PM8008 is described and an overlay for the Vision mezzanine is introduced. On SDM630 the compute DSP remoteproc, FastRPC and related entites are described. The LPASS LPI pinctrl node is described. On SDM845-based OnePlus device the bootloader framebuffer and its resources are described, to improve the transition. On the SDM845-based devices from OnePlus, SHIFT, and Xiaomi ath10k calibration variants are specified. The sensor remoteproc is enabled on Xiaomi Pocophone F1. On SM7225-based Fairphone FP4 regulators for the cameras are described, and the camera EEPROM is added. On SM8650 the camera subsystem is described. On the QRD the Samsung S5KJN1 camera sensor is added, and for the HDK an overlay for the "Rear Camera Card" is added. On SM8750 CPUfreq, SDCHCI and Iris (video encode/decode) support are added, and missing - required - properties for the BAM DMA is added. These are then enabled on the MTP. On Talos (SM6150/QCS615) PMU, DisplayPort, and USB/DP combo PHY are added. DisplayPort is enabled on the Talos Ride board. On Hamoa (X Elite) add crypto engine, missing TCSR reference clocks, and random number generator block. The soc bus address width is corrected to match the hardware. On the Lenovo Thinkpad T14s HDMI and audio playback over DisplayPort is introduced. HDMI, Iris (video encode/decode) and PS8830 retimers are described for the ASUS Vivobook S 15. On the Hamoa evaluation kit (EVK) PCIe busses, WiFi, backlight, TPM and RG (red/green) LEDs are described. Enable QSEECOM, and thereby UEFI variable access, on the Medion SPRCHRGD 14 S1 (commit should have been on drivers branch). -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmluY0UACgkQCx85Pw2Z rcULshAA2wZmfS4CeeZjIGUMbZg+ntby1xUJ4cKTeUR9IDd86L57qAkhHCNaP/ST 8ta22+4W9uId2zDTyxxmXbf5rTLIkc+t0dLjkl48HHmu6Kmxc2qALwcW7m2Cw/AI 3MAXUxVMmTM8BKvxSqW4lzNtQehxMXuErxXzVyUdzHMyiard25HUmXuMTsbIcteK yXr+SsAfisSjLTYAYhXkRihPK6OqYO9LkO1pah1Uf1pFY4FtJCbCEQR3a4uSTaQf u/NMQAc83LcboM2al1eHVU9fCeoA/oH/i6VZfpEAQLFf7cvsDP6f8CZF8RDWs1NE CdISQQdZxmgIfCawq5yt2765NR91Q8E64e49GSi56FWTEX+WBdohLR1qRLl7OrNM /rlvB29GhFTpxCjV5JwoAGacS3dn2MScNSXQSQNMRZBpDgGMM2PtnyOc+IhjMb+2 vOZrU+RS7eph6d9++yrIAMZfnEo8NtwVo0Eu3n0LmPmn4PK/2Kc+OS0Vc8r7IwBI qrAj4kkFGsMkfTEH2m4OO3lFH/Dw04E/YX1bSx3uFBkf8oQZrzmQJmn6kUT2MY0a 9rIJgnoo1R8d6MRAFkEKQqaRisWqEhnN3EZvn1bQj+0HlC5o3AHgjZQhwuZ/y/3B DvD7sSV1qSkbF/Dxcy4VRXZI+T6PgybrbL/yF+CD6cZiR4Grw8w= =qT6q -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml3gp8ACgkQmmx57+YA GNmhbA//bKzmRMoV1kx7czXgCfAbSq0SAUNbHs294Zkog/8ILBWnSYiS1smMlKfe W7c9x/7QT1myy2TiEZ2wDGzGWC/7benTu5HHGSL+UTSc3vVfKb3wpN021kuhxfhW fNpATd6oiOtuGfURgaZlXHaJlDS8TDXr+jJ8lgDKUuMmyJPpBf265/eyS8pSCoVR l6ImLT3Im2G4qXhYV7LzApTqe3wu6H6AW2EGPrAHWz4WrebTOzAr2yEY0CPOsPqA EnF2slYnPsRYz7RwkBwXM8gSX7711iGwOp/xQWIqmZxHaQa915w816bnPLzWxJTg j384ly4sJw/C047iLQdZBaqgGGU9Pu8/3iK1K0mlnfc3NmF1KeaSu3KKB4XxLkF/ +zw1gFjU6xCbfphHk44f8+hQdsIDa6wpL2jV4VdAE989wtOH2pIPS1WRboZCcvLz LummFnQigACAfwKygnmHGIEtVA1rw0U5wfRdvVq2slv2Kfrye5x92QgY/euuR2wW 7XWIubZESPHqvBPSa2bG7XNcd5gG+EaSZg0apJ6s9JbMm1PHjtKbnEqmv2E5GYUE bO3/XPrAalQ+bpN7TvCPkoFgD3Qr6SPK1Du/zQgIf0i5L/CGKKdaE/EVcmXSOOPR 4MH7kQQx7zcQ6i2OUOfDuGZemGGLOXXRZmGsJpY686gsLg6FYN8= =3Isi -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm Arm64 DeviceTree for v6.20 Introduce the Kaanapali SoC, with the MTP and QRD devices. Introduce support for the Milos SoC (SM7635) and initial support for the Fairphone (Gen 6) device on this platform. Add the QCS6490-based RubikPI3 board, the QRB2210-based Arduino UnoQ, the X Elite-based Medion SPRCHRGD 14 S1 and Surface Pro 11 laptops, and the SDM845-based Pixel 3 and Pixel 3 XL devices. On the Kodiak-based (QCS6490) RB3Gen2 the TC9563 PCIe switch controller is described. On Lemans (SA8775P/QCS9075) the GPU and crypto blocks are added. IO-regions and clocks are added to interconnect nodes to allow QoS configuration. GPU, TPM and USB support are enabled on the evaluation kit (EVK). On Monaco (QCS8300) the two PCIe controllers, the camera subsystem, tsens, display subsystem, crypto, CPUfreq, and coresight are added. On the evaluation kit (EVK) the PCIe busses are enabled, together with an AMC6821-based fan controller and the ST33 TPM chip. On MSM8939 the camera subsystem is described. The Asus ZenFone 2 Laser/Selfie gains battery and hall sensor support. On the Agatti-based RB1 board PM8008 is described and an overlay for the Vision mezzanine is introduced. On SDM630 the compute DSP remoteproc, FastRPC and related entites are described. The LPASS LPI pinctrl node is described. On SDM845-based OnePlus device the bootloader framebuffer and its resources are described, to improve the transition. On the SDM845-based devices from OnePlus, SHIFT, and Xiaomi ath10k calibration variants are specified. The sensor remoteproc is enabled on Xiaomi Pocophone F1. On SM7225-based Fairphone FP4 regulators for the cameras are described, and the camera EEPROM is added. On SM8650 the camera subsystem is described. On the QRD the Samsung S5KJN1 camera sensor is added, and for the HDK an overlay for the "Rear Camera Card" is added. On SM8750 CPUfreq, SDCHCI and Iris (video encode/decode) support are added, and missing - required - properties for the BAM DMA is added. These are then enabled on the MTP. On Talos (SM6150/QCS615) PMU, DisplayPort, and USB/DP combo PHY are added. DisplayPort is enabled on the Talos Ride board. On Hamoa (X Elite) add crypto engine, missing TCSR reference clocks, and random number generator block. The soc bus address width is corrected to match the hardware. On the Lenovo Thinkpad T14s HDMI and audio playback over DisplayPort is introduced. HDMI, Iris (video encode/decode) and PS8830 retimers are described for the ASUS Vivobook S 15. On the Hamoa evaluation kit (EVK) PCIe busses, WiFi, backlight, TPM and RG (red/green) LEDs are described. Enable QSEECOM, and thereby UEFI variable access, on the Medion SPRCHRGD 14 S1 (commit should have been on drivers branch). * tag 'qcom-arm64-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (155 commits) dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali and Glymur Platforms dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali arm64: dts: qcom: lemans: enable static TPDM arm64: dts: qcom: kodiak: Add memory region for audiopd arm64: dts: qcom: x1e78100-lenovo-thinkpad-t14s: add HDMI nodes arm64: dts: qcom: x1e: bus is 40-bits (fix 64GB models) arm64: dts: qcom: lemans; Add EL2 overlay arm64: dts: qcom: sm8150: add uart13 arm64: dts: qcom: sdm845-db845c: specify power for WiFi CH1 arm64: dts: qcom: sdm845-db845c: drop CS from SPIO0 arm64: dts: qcom: qrb4210-rb2: Fix UART3 wakeup IRQ storm arm64: dts: qcom: sm6125-ginkgo: Fix missing msm-id subtype arm64: dts: qcom: qcs8300: Add GPU cooling arm64: dts: qcom: sa8775p: Add reg and clocks for QoS configuration arm64: dts: qcom: hamoa-iot-evk: Enable TPM (ST33) on SPI11 arm64: dts: qcom: talos: Add PMU support arm64: dts: qcom: talos: switch to interrupt-cells 4 to add PPI partitions arm64: dts: qcom: ipq9574: Complete USB DWC3 wrapper interrupts arm64: dts: qcom: ipq5018: Correct USB DWC3 wrapper interrupts arm64: dts: qcom: monaco: Add CTCU and ETR nodes ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>	2026-01-26 16:05:01 +01:00
Guodong Xu	216e0a5e98	dt-bindings: soc: spacemit: Add K3 reset support and IDs Update the spacemit,k1-syscon.yaml binding to document K3 SoC reset support. K3 reset devices are registered at runtime as auxiliary devices by the K3 CCU driver. Since K3 reuses the K1 syscon binding, there is no separate YAML binding file for K3 resets. Update #reset-cells description to document where reset IDs are defined. Acked-by: Alex Elder <elder@riscstar.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Guodong Xu <guodong@riscstar.com> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://lore.kernel.org/spacemit/20260114092742-GYC7933267@gentoo.org/ [1] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>	2026-01-24 16:53:02 +01:00
Jakub Kicinski	9abf22075d	Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Cross-merge networking fixes after downstream PR (net-6.19-rc7). Conflicts: drivers/net/ethernet/huawei/hinic3/hinic3_irq.c `b35a6fd37a` ("hinic3: Add adaptive IRQ coalescing with DIM") `fb2bb2a1eb` ("hinic3: Fix netif_queue_set_napi queue_index input parameter error") https://lore.kernel.org/fc0a7fdf08789a52653e8ad05281a0a849e79206.1768915707.git.zhuyikai1@h-partners.com drivers/net/wireless/ath/ath12k/mac.c drivers/net/wireless/ath/ath12k/wifi7/hw.c `3170757210` ("wifi: ath12k: Fix wrong P2P device link id issue") `c26f294fef` ("wifi: ath12k: Move ieee80211_ops callback to the arch specific module") https://lore.kernel.org/20260114123751.6a208818@canb.auug.org.au Adjacent changes: drivers/net/wireless/ath/ath12k/mac.c `8b8d6ee53d` ("wifi: ath12k: Fix scan state stuck in ABORTING after cancel_remain_on_channel") `914c890d3b` ("wifi: ath12k: Add framework for hardware specific ieee80211_ops registration") Signed-off-by: Jakub Kicinski <kuba@kernel.org>	2026-01-22 20:14:36 -08:00
Frank Wunderlich	aee1950f73	dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT7987 Add thermal controller definition for MT7987. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251223175710.25850-2-linux@fw-web.de Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>	2026-01-20 20:54:17 +01:00
Laura Nao	03656dc61d	dt-bindings: thermal: mediatek: Add LVTS thermal controller support for MT8196 Add LVTS thermal controller binding for MediaTek MT8196. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Laura Nao <laura.nao@collabora.com> Link: https://patch.msgid.link/20251125-mt8196-lvts-v4-v5-1-6db7eb903fb7@collabora.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>	2026-01-20 20:41:49 +01:00
Krzysztof Kozlowski	a0d3aeaa34	Merge branch 'for-v6.20/dt-bindings-clk' into next/clk Merge DT binding headers from topic branch, used by the driver.	2026-01-17 20:29:51 +01:00
Peter Griffin	52300cd894	dt-bindings: clock: google,gs101-clock: Add DPU clock management unit Add dt schema documentation and clock IDs for the Display Process Unit (DPU) clock management unit (CMU). This CMU feeds IPs such as image scaler, enhancer and compressor. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260113-dpu-clocks-v3-2-cb85424f2c72@linaro.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>	2026-01-17 20:29:38 +01:00
Vinod Koul	a699808928	phy common properties Vladimir Oltean <vladimir.oltean@nxp.com> wrote: Introduce "rx-polarity" and "tx-polarity" device tree properties with Kunit tests -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmlnl3IACgkQfBQHDyUj g0dz1Q/+L0d0rin2AtgetIIn5zv/OhMAcDo55eJ1fktBFDMBW/M1SIj+fCJ+kxsc t4MWBxoiwRFxnZCV3SrxuOMsGfGRINXlTicC9j9PDY+Z+IsCrZhL3LOyJQuV3FgQ +Dht+OUhDr5y4jNVh5af/oD92dBYDwlyUP46Bem1cSVnDdXJ2kOEpbxOnKfW6oNK leif7ufahVZMHNbMUq7mu7ro95FpUV848fTbEBW4VhelLjg8qxZWYFsdiEMwshYw vr7pJShph9o86DBAmvu43eR6dSgQl1fD2PEQXVYfrjQ1hyEPEZugLmLskd1gdvj2 rEClo1VNuruAPvgMuwifVDt8RjdABfu15GY6x/W+l3Nqx6SQCNZVJdLGRYXs+Qq4 e5GCWhG1xtzeGDVNr12Ynk4/VF+nwjrJ+57SEV/vjfnZKlzg4nZD31+qAH5uDtrK Gc1TCCqsUTg806XGKB9h+6r8fAspgmEe+cur2TrEeFZJ3GQrIJTBfgmXZ5hJZsWn TW02+JfjLk/I9nvBLfyNbiZgpOFppnQCYk5bGPxfQxJfibhIO0SpVFigGRX8Pgb+ 0g7IAyl9AEatterhtOB7QWiTPNOxIlQPFr5IM+8wCRUC+tdr7YCwARZexXUyokOz CKNUCSsBofGTK9sGlaWfxWS1i6mYGTbPklrXiYoPv/K8wDcIQyo= =aAVU -----END PGP SIGNATURE----- Merge tag 'phy_common_properties' into next phy common properties Vladimir Oltean <vladimir.oltean@nxp.com> wrote: Introduce "rx-polarity" and "tx-polarity" device tree properties with Kunit tests	2026-01-14 18:52:57 +05:30
Vladimir Oltean	fceb17ac05	dt-bindings: phy-common-props: RX and TX lane polarity inversion Differential signaling is a technique for high-speed protocols to be more resilient to noise. At the transmit side we have a positive and a negative signal which are mirror images of each other. At the receiver, if we subtract the negative signal (say of amplitude -A) from the positive signal (say +A), we recover the original single-ended signal at twice its original amplitude. But any noise, like one coming from EMI from outside sources, is supposed to have an almost equal impact upon the positive (A + E, E being for "error") and negative signal (-A + E). So (A + E) - (-A + E) eliminates this noise, and this is what makes differential signaling useful. Except that in order to work, there must be strict requirements observed during PCB design and layout, like the signal traces needing to have the same length and be physically close to each other, and many others. Sometimes it is not easy to fulfill all these requirements, a simple case to understand is when on chip A's pins, the positive pin is on the left and the negative is on the right, but on the chip B's pins (with which A tries to communicate), positive is on the right and negative on the left. The signals would need to cross, using vias and other ugly stuff that affects signal integrity (introduces impedance discontinuities which cause reflections, etc). So sometimes, board designers intentionally connect differential lanes the wrong way, and expect somebody else to invert that signal to recover useful data. This is where RX and TX polarity inversion comes in as a generic concept that applies to any high-speed serial protocol as long as it uses differential signaling. I've stopped two attempts to introduce more vendor-specific descriptions of this only in the past month: https://lore.kernel.org/linux-phy/20251110110536.2596490-1-horatiu.vultur@microchip.com/ https://lore.kernel.org/netdev/20251028000959.3kiac5kwo5pcl4ft@skbuf/ and in the kernel we already have merged: - "st,px_rx_pol_inv" - "st,pcie-tx-pol-inv" - "st,sata-tx-pol-inv" - "mediatek,pnswap" - "airoha,pnswap-rx" - "airoha,pnswap-tx" and maybe more. So it is pretty general. One additional element of complexity is introduced by the fact that for some protocols, receivers can automatically detect and correct for an inverted lane polarity (example: the PCIe LTSSM does this in the Polling.Configuration state; the USB 3.1 Link Layer Test Specification says that the detection and correction of the lane polarity inversion in SuperSpeed operation shall be enabled in Polling.RxEQ.). Whereas for other protocols (SGMII, SATA, 10GBase-R, etc etc), the polarity is all manual and there is no detection mechanism mandated by their respective standards. So why would one even describe rx-polarity and tx-polarity for protocols like PCIe, if it had to always be PHY_POL_AUTO? Related question: why would we define the polarity as an array per protocol? Isn't the physical PCB layout protocol-agnostic, and aren't we describing the same physical reality from the lens of different protocols? The answer to both questions is because multi-protocol PHYs exist (supporting e.g. USB2 and USB3, or SATA and PCIe, or PCIe and Ethernet over the same lane), one would need to manually set the polarity for SATA/Ethernet, while leaving it at auto for PCIe/USB 3.0+. I also investigated from another angle: what if polarity inversion in the PHY is one layer, and then the PCIe/USB3 LTSSM polarity detection is another layer on top? Then rx-polarity = <PHY_POL_AUTO> doesn't make sense, it can still be rx-polarity = <PHY_POL_NORMAL> or <PHY_POL_INVERT>, and the link training state machine figures things out on top of that. This would radically simplify the design, as the elimination of PHY_POL_AUTO inherently means that the need for a property array per protocol also goes away. I don't know how things are in the general case, but at least in the 10G and 28G Lynx SerDes blocks from NXP Layerscape devices, this isn't the case, and there's only a single level of RX polarity inversion: in the SerDes lane. In the case of PCIe, the controller is in charge of driving the RDAT_INV bit autonomously, and it is read-only to software. So the existence of this kind of SerDes lane proves the need for PHY_POL_AUTO to be a third state. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260111093940.975359-5-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>	2026-01-14 18:16:05 +05:30
Swapnil Jakhade	a632a2a0db	dt-bindings: phy: Add PHY_TYPE_XAUI definition XAUI (eXtended Attachment Unit Interface) is a high-speed serial interface standard for 10 Gigabit Ethernet (10GbE). It uses four lanes with each lane operating at 3.125 Gbps (totaling 10 Gbps), to extend the XGMII interface across circuit boards, commonly used in backplanes for networking switches and high-performance computing. XAUI is defined as a standardized instantiation of XGMII Extender in the IEEE 802.3 specification. Add definition for XAUI PHY type. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> [s-vadapalli: added detailed description of XAUI in the commit message] Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260112054636.108027-2-s-vadapalli@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>	2026-01-14 15:03:09 +05:30
Geert Uytterhoeven	69a134769c	Renesas RZ/T2H and RZ/N2H PCLKCAN Clock DT Binding Definitions PCLKCAN Clock DT binding definitions for the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaV90ZgAKCRCKwlD9ZEnx cCYiAPkBF/BPXZsDfCNME4N5l0gNoN44RZJZhFPb6adkNG2LYwEA/Rwk0+bx0y9e qSNAj01diXbv56oKZIlXuKcju7ZVNAU= =Fkj5 -----END PGP SIGNATURE----- Merge tag 'renesas-r9a09g077-dt-binding-defs-tag6' into renesas-dts-for-v6.20 Renesas RZ/T2H and RZ/N2H PCLKCAN Clock DT Binding Definitions PCLKCAN Clock DT binding definitions for the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs, shared by driver and DT source files.	2026-01-09 12:12:20 +01:00
Geert Uytterhoeven	c07dd5ac0e	Renesas RZ/T2H and RZ/N2H PCLKCAN Clock DT Binding Definitions PCLKCAN Clock DT binding definitions for the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaV90ZgAKCRCKwlD9ZEnx cCYiAPkBF/BPXZsDfCNME4N5l0gNoN44RZJZhFPb6adkNG2LYwEA/Rwk0+bx0y9e qSNAj01diXbv56oKZIlXuKcju7ZVNAU= =Fkj5 -----END PGP SIGNATURE----- Merge tag 'renesas-r9a09g077-dt-binding-defs-tag6' into renesas-clk-for-v6.20 Renesas RZ/T2H and RZ/N2H PCLKCAN Clock DT Binding Definitions PCLKCAN Clock DT binding definitions for the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs, shared by driver and DT source files.	2026-01-09 11:25:29 +01:00
Yixun Lan	efe897b557	dt-bindings: soc: spacemit: k3: add clock support Add compatible strings for clock drivers to support Spacemit K3 SoC, also includes all the defined clock IDs. The SpacemiT K3 SoC clock IP is scattered over several different blocks, which are APBC, APBS, APMU, DCIU, MPMU, all of them are capable of generating clock and reset signals. APMU and MPMU have additional Power Domain management functionality. Following is a brief list that shows devices managed in each block: APBC: UART, GPIO, PWM, SPI, TIMER, I2S, IR, DR, TSEN, IPC, CAN APBS: various PPL clocks control APMU: CCI, CPU, CSI, ISP, LCD, USB, QSPI, DMA, VPU, GPU, DSI, PCIe, EMAC.. DCID: SRAM, DMA, TCM MPMU: various PLL1 derived clocks, UART, WATCHDOG, I2S Link: https://lore.kernel.org/r/20260108-k3-clk-v5-1-42a11b74ad58@gentoo.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Yixun Lan <dlan@gentoo.org>	2026-01-09 10:27:10 +08:00
Lad Prabhakar	481b64376c	dt-bindings: clock: renesas,r9a09g077/87: Add PCLKCAN ID Add PCLKCAN ID for CANFD to both R9A09G077 and R9A09G087 SoCs. This definition is required for describing CANFD device in DT. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251224165049.3384870-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>	2026-01-08 10:07:47 +01:00
Bjorn Andersson	86f5c81f24	Merge branch '20260107-kaanapali-mmcc-v3-v3-0-8e10adc236a8@oss.qualcomm.com' into clk-for-6.20 Merge the Kaanapali camera, display, GPU, and video clock controller bindings through a topic branch, to allow making them available to the DeviceTree branch as well.	2026-01-07 09:52:57 -06:00
Taniya Das	ecc3adefa7	dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller Qualcomm GX(graphics) is a clock controller which has PLLs, clocks and Power domains (GDSC), but the requirement from the SW driver is to use the GDSC power domain from the clock controller to recover the GPU firmware in case of any failure/hangs. The rest of the resources of the clock controller are being used by the firmware of GPU. This module exposes the GDSC power domains which helps the recovery of Graphics subsystem. Add bindings documentation for the Kaanapali Graphics Clock and Graphics power domain Controller for Kaanapali SoC. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-7-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2026-01-07 09:42:14 -06:00
Taniya Das	e043131550	dt-bindings: clock: qcom: Add Kaanapali video clock controller Add device tree bindings for the video clock controller on Qualcomm Kaanapali SoC. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-6-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2026-01-07 09:42:14 -06:00
Taniya Das	9d566b0431	dt-bindings: clock: qcom: Add support for CAMCC for Kaanapali Update the compatible and the bindings for CAMCC support on Kaanapali SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-5-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2026-01-07 09:42:14 -06:00
Taniya Das	322aad122c	dt-bindings: clock: qcom: document Kaanapali DISPCC clock controller Document device tree bindings for display clock controller for Qualcomm Kaanapali SoC. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-4-8e10adc236a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2026-01-07 09:42:14 -06:00
Bjorn Andersson	6ff40ddbb4	Merge branch '20251202-sm8750_camcc-v1-2-b3f7ef6723f1@oss.qualcomm.com' into clk-for-6.20 Merge the SM8750 camera clock controller binding through a topic branch, in order to allow the defines to made availabe to the DeviceTree branch as well.	2026-01-07 09:37:15 -06:00
Taniya Das	82efed175b	dt-bindings: clock: qcom: Add camera clock controller for SM8750 SoC Add device tree bindings for the camera clock controller on Qualcomm SM8750 platform. The camera clock controller is split between camcc and cambist. The cambist controls the mclks of the camera clock controller. Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251202-sm8750_camcc-v1-2-b3f7ef6723f1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2026-01-07 09:37:01 -06:00
Barnabás Czémán	d88d5bedb5	dt-bindings: clock: qcom: Add MSM8940 Global Clock Controller Add devicetree bindings for the global clock controller on Qualcomm MSM8940 platform. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20251117-gcc-msm8940-sdm439-v2-1-4af57c8bc7eb@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2026-01-07 09:34:28 -06:00
Bjorn Andersson	e54a69a1bc	Merge branch '20251117-mdss-resets-msm8917-msm8937-v2-1-a7e9bbdaac96@mainlining.org' into HEAD Merge the addition of MDSS reset to the MSM8917 GCC binding, in order to get access to the introduced constant.	2026-01-03 13:20:56 -06:00
Bjorn Andersson	fd5b470f87	Merge branch '20260103-ufs_symbol_clk-v2-1-51828cc76236@oss.qualcomm.com' into clk-for-6.20 Merge the addition of missing UFS PHY clocks in Hamoa GCC binding through topic branch, to allow it to be merged into DeviceTree branch as well.	2026-01-03 08:39:43 -06:00
Taniya Das	5fc25d64c4	dt-bindings: clock: qcom,x1e80100-gcc: Add missing UFS mux clocks Add some of the UFS symbol rx/tx muxes were not initially described. Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260103-ufs_symbol_clk-v2-1-51828cc76236@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2026-01-03 08:39:35 -06:00
Barnabás Czémán	21dcacabcc	dt-bindings: clock: gcc-msm8917: Add missing MDSS reset Add definition for MDSS reset can be found on MSM8917 and MSM8937. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20251117-mdss-resets-msm8917-msm8937-v2-1-a7e9bbdaac96@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2025-12-24 21:46:05 -06:00
Raghav Sharma	db1cc4902f	dt-bindings: clock: exynosautov920: add MFD clock definitions Add device tree clock binding definitions for CMU_MFD Signed-off-by: Raghav Sharma <raghav.s@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251119114744.1914416-2-raghav.s@samsung.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>	2025-12-21 14:30:26 +01:00
AngeloGioacchino Del Regno	dee49a1860	dt-bindings: interconnect: mt8183-emi: Add support for MT8196 EMI Add a new compatible for the External Memory Interface Interconnect found on the MediaTek MT8196 Chromebook SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20251124-mt8196-dvfsrc-v2-3-d9c1334db9f3@collabora.com Signed-off-by: Georgi Djakov <djakov@kernel.org>	2025-12-21 13:58:39 +02:00
Yao Zi	5f352125f8	dt-bindings: clock: thead,th1520-clk-ap: Add ID for C910 bus clock Add binding ID for C910 bus clock, which takes CLK_C910 as parent and is essential for C910 cluster's operation. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Yao Zi <ziyao@disroot.org> Signed-off-by: Drew Fustini <fustini@kernel.org>	2025-12-18 11:14:45 -08:00
Konrad Dybcio	45e1be5dde	dt-bindings: power: qcom,rpmpd: Add SC8280XP_MXC_AO Not sure how useful it's gonna be in practice, but the definition is missing (unlike the previously-unused SC8280XP_MXC-non-_AO), so add it to allow the driver to create the corresponding pmdomain. Fixes: `dbfb5f94e0` ("dt-bindings: power: rpmpd: Add sc8280xp RPMh power-domains") Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20251202-topic-8280_mxc-v2-1-46cdf47a829e@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2025-12-16 15:24:09 -08:00

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