moved the context saving APIs around to fix a build error in certain
configurations. There was a change to the core framework for
CLK_OPS_PARENT_ENABLE behavior during registration, but it wrecked existing
drivers that didn't expect things to be turned off during clk registration so
it got reverted.
This cycle is really a large collection of new clk drivers, primarily for
Qualcomm SoCs but also for Amlogic, SpacemiT, Google, and Aspeed. Another big
change in here is support for automatic hardware clock gating on Samsung SoCs
where the clks turn on and off when needed. Ideally more vendors move to this
method for better power savings. The highlights are in the updates section
below.
Beyond all the new drivers we have a bunch of cleanups like converting drivers
from divider_round_rate() to divider_determine_rate() and using scoped for each
OF child loops. Otherwise it's the usual data fixes and plugging reference
leaks, etc. that's all pretty ordinary but not critical enough to fix until the
next release.
New Drivers:
- Qualcomm Kaanapali global, tcsr, rpmh, display, gpu, camera, and video clk
controllers
- Qualcomm SM8750 camera clk controllers
- Qualcomm MSM8940 and SDM439 global clk controllers
- Google GS101 Display Process Unit (DPU) clk controllers
- SpacemiT K3 clk controllers
- Amlogic t7 clk controllers
- Aspeed AST2700 clk controllers
Updates:
- Convert clock dividers from round_rate() to determine_rate()
- Fix sparse warnings, kernel-doc warnings, and plug leaked OF refs
- Automatic hardware clk gating on Google GS101 SoCs
- Amlogic s4 video clks
- CAN-FD clks and resets on Renesas RZ/T2H, RZ/N2H, RZ/V2H, and RZ/V2N
- Expanded Serial Peripheral Interface (xSPI) clocks and resets on Renesas
RZ/T21H and RZ/N2H
- DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks and resets
on Renesas RZ/V2N
- More serial (RSCI) clocks and resets on Renesas RZ/V2H and RZ/V2N
- CPU frequency scaling on T-HEAD TH1520
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Not much changed in the clk framework this time except the clk.h
consumer API moved the context saving APIs around to fix a build error
in certain configurations.
There was a change to the core framework for CLK_OPS_PARENT_ENABLE
behavior during registration, but it wrecked existing drivers that
didn't expect things to be turned off during clk registration so it
got reverted.
This cycle is really a large collection of new clk drivers, primarily
for Qualcomm SoCs but also for Amlogic, SpacemiT, Google, and Aspeed.
Another big change in here is support for automatic hardware clock
gating on Samsung SoCs where the clks turn on and off when needed.
Ideally more vendors move to this method for better power savings. The
highlights are in the updates section below.
Beyond all the new drivers we have a bunch of cleanups like converting
drivers from divider_round_rate() to divider_determine_rate() and
using scoped for each OF child loops. Otherwise it's the usual data
fixes and plugging reference leaks, etc. that's all pretty ordinary
but not critical enough to fix until the next release.
New Drivers:
- Qualcomm Kaanapali global, tcsr, rpmh, display, gpu, camera, and
video clk controllers
- Qualcomm SM8750 camera clk controllers
- Qualcomm MSM8940 and SDM439 global clk controllers
- Google GS101 Display Process Unit (DPU) clk controllers
- SpacemiT K3 clk controllers
- Amlogic t7 clk controllers
- Aspeed AST2700 clk controllers
Updates:
- Convert clock dividers from round_rate() to determine_rate()
- Fix sparse warnings, kernel-doc warnings, and plug leaked OF refs
- Automatic hardware clk gating on Google GS101 SoCs
- Amlogic s4 video clks
- CAN-FD clks and resets on Renesas RZ/T2H, RZ/N2H, RZ/V2H, and
RZ/V2N
- Expanded Serial Peripheral Interface (xSPI) clocks and resets on
Renesas RZ/T21H and RZ/N2H
- DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks and
resets on Renesas RZ/V2N
- More serial (RSCI) clocks and resets on Renesas RZ/V2H and RZ/V2N
- CPU frequency scaling on T-HEAD TH1520"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (165 commits)
clk: aspeed: Add reset for HACE/VIDEO
dt-bindings: clock: aspeed: Add VIDEO reset definition
clk: aspeed: add AST2700 clock driver
MAINTAINERS: Add entry for ASPEED clock drivers.
clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory.
Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc"
clk: Disable KUNIT_UML_PCI
dt-bindings: clk: rs9: Fix DIF pattern match
clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS()
clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841
clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc
clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc
clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc
clk: mediatek: Fix error handling in runtime PM setup
clk: mediatek: don't select clk-mt8192 for all ARM64 builds
clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks
clk: mediatek: Refactor pllfh registration to pass device
clk: mediatek: Pass device to clk_hw_register for PLLs
clk: mediatek: Refactor pll registration to pass device
clk: Respect CLK_OPS_PARENT_ENABLE during recalc
...
DT core:
- Sync dtc/libfdt with upstream v1.7.2-62-ga26ef6400bd8
- Add a for_each_compatible_node_scoped() loop and convert users in
cpufreq, dmaengine, clk, cdx, powerpc and Arm
- Simplify of/platform.c with scoped loop helpers
- Add fw_devlink tracking for "mmc-pwrseq"
- Optimize fw_devlink callback code size for pinctrl-N properties
- Replace strcmp_suffix() with strends()
DT bindings:
- Support building single binding targets
- Convert google,goldfish-fb, cznic,turris-mox-rwtm, ti,prm-inst
- Add bindings for Freescale AVIC, Realtek RTD1xxx system controllers,
Microchip 25AA010A EEPROM, OnSemi FIN3385, IEI WT61P803 PUZZLE, Delta
Electronics DPS-800-AB power supply, Infineon IR35221 Digital
Multi-phase Controller, Infineon PXE1610 Digital Dual Output 6+1
VR12.5 & VR13 CPU Controller, socionext,uniphier-smpctrl, and
xlnx,zynqmp-firmware
- Lots of trivial binding fixes to address warnings in DTS files. These
are mostly for arm64 platforms which is getting closer to be warning
free. Some public shaming has helped.
- Fix I2C bus node names in examples
- Drop obsolete brcm,vulcan-soc binding
- Drop unreferenced binding headers
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Merge tag 'devicetree-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT core:
- Sync dtc/libfdt with upstream v1.7.2-62-ga26ef6400bd8
- Add a for_each_compatible_node_scoped() loop and convert users in
cpufreq, dmaengine, clk, cdx, powerpc and Arm
- Simplify of/platform.c with scoped loop helpers
- Add fw_devlink tracking for "mmc-pwrseq"
- Optimize fw_devlink callback code size for pinctrl-N properties
- Replace strcmp_suffix() with strends()
DT bindings:
- Support building single binding targets
- Convert google,goldfish-fb, cznic,turris-mox-rwtm, ti,prm-inst
- Add bindings for Freescale AVIC, Realtek RTD1xxx system
controllers, Microchip 25AA010A EEPROM, OnSemi FIN3385, IEI
WT61P803 PUZZLE, Delta Electronics DPS-800-AB power supply,
Infineon IR35221 Digital Multi-phase Controller, Infineon PXE1610
Digital Dual Output 6+1 VR12.5 & VR13 CPU Controller,
socionext,uniphier-smpctrl, and xlnx,zynqmp-firmware
- Lots of trivial binding fixes to address warnings in DTS files.
These are mostly for arm64 platforms which is getting closer to be
warning free. Some public shaming has helped.
- Fix I2C bus node names in examples
- Drop obsolete brcm,vulcan-soc binding
- Drop unreferenced binding headers"
* tag 'devicetree-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (60 commits)
dt-bindings: interrupt-controller: Add compatiblie string fsl,imx(1|25|27|31|35)-avic
dt-bindings: soc: imx: add fsl,aips and fsl,emi compatible strings
dt-bindings: display: bridge: lt8912b: Drop reset gpio requirement
dt-bindings: firmware: fsl,scu: Mark multi-channel MU layouts as deprecated
cpufreq: s5pv210: Simplify with scoped for each OF child loop
dmaengine: fsl_raid: Simplify with scoped for each OF child loop
clk: imx: imx31: Simplify with scoped for each OF child loop
clk: imx: imx27: Simplify with scoped for each OF child loop
cdx: Use mutex guard to simplify error handling
cdx: Simplify with scoped for each OF child loop
powerpc/wii: Simplify with scoped for each OF child loop
powerpc/fsp2: Simplify with scoped for each OF child loop
ARM: exynos: Simplify with scoped for each OF child loop
ARM: at91: Simplify with scoped for each OF child loop
of: Add for_each_compatible_node_scoped() helper
dt-bindings: Fix emails with spaces or missing brackets
scripts/dtc: Update to upstream version v1.7.2-62-ga26ef6400bd8
dt-bindings: crypto: inside-secure,safexcel: Mandate only ring IRQs
dt-bindings: crypto: inside-secure,safexcel: Add SoC compatibles
of: reserved_mem: Fix placement of __free() annotation
...
ASPEED clock controller provides a couple of resets. Add the define of
video to allow referring to it.
Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Remove includes which are not referenced by either DTS files or drivers.
There's a few more which are new, so they are excluded for now.
Reviewed-by: Linus Walleij <linusw@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20251212231203.727227-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Introduce the Kaanapali SoC, with the MTP and QRD devices. Introduce
support for the Milos SoC (SM7635) and initial support for the Fairphone
(Gen 6) device on this platform.
Add the QCS6490-based RubikPI3 board, the QRB2210-based Arduino UnoQ,
the X Elite-based Medion SPRCHRGD 14 S1 and Surface Pro 11 laptops, and
the SDM845-based Pixel 3 and Pixel 3 XL devices.
On the Kodiak-based (QCS6490) RB3Gen2 the TC9563 PCIe switch controller
is described.
On Lemans (SA8775P/QCS9075) the GPU and crypto blocks are added.
IO-regions and clocks are added to interconnect nodes to allow QoS
configuration. GPU, TPM and USB support are enabled on the evaluation
kit (EVK).
On Monaco (QCS8300) the two PCIe controllers, the camera subsystem,
tsens, display subsystem, crypto, CPUfreq, and coresight are added. On
the evaluation kit (EVK) the PCIe busses are enabled, together with an
AMC6821-based fan controller and the ST33 TPM chip.
On MSM8939 the camera subsystem is described. The Asus ZenFone 2
Laser/Selfie gains battery and hall sensor support.
On the Agatti-based RB1 board PM8008 is described and an overlay for the
Vision mezzanine is introduced.
On SDM630 the compute DSP remoteproc, FastRPC and related entites are
described. The LPASS LPI pinctrl node is described.
On SDM845-based OnePlus device the bootloader framebuffer and its
resources are described, to improve the transition. On the SDM845-based
devices from OnePlus, SHIFT, and Xiaomi ath10k calibration variants are
specified. The sensor remoteproc is enabled on Xiaomi Pocophone F1.
On SM7225-based Fairphone FP4 regulators for the cameras are described,
and the camera EEPROM is added.
On SM8650 the camera subsystem is described. On the QRD the Samsung
S5KJN1 camera sensor is added, and for the HDK an overlay for the "Rear
Camera Card" is added.
On SM8750 CPUfreq, SDCHCI and Iris (video encode/decode) support are
added, and missing - required - properties for the BAM DMA is added.
These are then enabled on the MTP.
On Talos (SM6150/QCS615) PMU, DisplayPort, and USB/DP combo PHY are added.
DisplayPort is enabled on the Talos Ride board.
On Hamoa (X Elite) add crypto engine, missing TCSR reference clocks, and
random number generator block. The soc bus address width is corrected to
match the hardware. On the Lenovo Thinkpad T14s HDMI and audio playback
over DisplayPort is introduced. HDMI, Iris (video encode/decode) and
PS8830 retimers are described for the ASUS Vivobook S 15. On the Hamoa
evaluation kit (EVK) PCIe busses, WiFi, backlight, TPM and RG
(red/green) LEDs are described.
Enable QSEECOM, and thereby UEFI variable access, on the Medion SPRCHRGD
14 S1 (commit should have been on drivers branch).
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Merge tag 'qcom-arm64-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm64 DeviceTree for v6.20
Introduce the Kaanapali SoC, with the MTP and QRD devices. Introduce
support for the Milos SoC (SM7635) and initial support for the Fairphone
(Gen 6) device on this platform.
Add the QCS6490-based RubikPI3 board, the QRB2210-based Arduino UnoQ,
the X Elite-based Medion SPRCHRGD 14 S1 and Surface Pro 11 laptops, and
the SDM845-based Pixel 3 and Pixel 3 XL devices.
On the Kodiak-based (QCS6490) RB3Gen2 the TC9563 PCIe switch controller
is described.
On Lemans (SA8775P/QCS9075) the GPU and crypto blocks are added.
IO-regions and clocks are added to interconnect nodes to allow QoS
configuration. GPU, TPM and USB support are enabled on the evaluation
kit (EVK).
On Monaco (QCS8300) the two PCIe controllers, the camera subsystem,
tsens, display subsystem, crypto, CPUfreq, and coresight are added. On
the evaluation kit (EVK) the PCIe busses are enabled, together with an
AMC6821-based fan controller and the ST33 TPM chip.
On MSM8939 the camera subsystem is described. The Asus ZenFone 2
Laser/Selfie gains battery and hall sensor support.
On the Agatti-based RB1 board PM8008 is described and an overlay for the
Vision mezzanine is introduced.
On SDM630 the compute DSP remoteproc, FastRPC and related entites are
described. The LPASS LPI pinctrl node is described.
On SDM845-based OnePlus device the bootloader framebuffer and its
resources are described, to improve the transition. On the SDM845-based
devices from OnePlus, SHIFT, and Xiaomi ath10k calibration variants are
specified. The sensor remoteproc is enabled on Xiaomi Pocophone F1.
On SM7225-based Fairphone FP4 regulators for the cameras are described,
and the camera EEPROM is added.
On SM8650 the camera subsystem is described. On the QRD the Samsung
S5KJN1 camera sensor is added, and for the HDK an overlay for the "Rear
Camera Card" is added.
On SM8750 CPUfreq, SDCHCI and Iris (video encode/decode) support are
added, and missing - required - properties for the BAM DMA is added.
These are then enabled on the MTP.
On Talos (SM6150/QCS615) PMU, DisplayPort, and USB/DP combo PHY are added.
DisplayPort is enabled on the Talos Ride board.
On Hamoa (X Elite) add crypto engine, missing TCSR reference clocks, and
random number generator block. The soc bus address width is corrected to
match the hardware. On the Lenovo Thinkpad T14s HDMI and audio playback
over DisplayPort is introduced. HDMI, Iris (video encode/decode) and
PS8830 retimers are described for the ASUS Vivobook S 15. On the Hamoa
evaluation kit (EVK) PCIe busses, WiFi, backlight, TPM and RG
(red/green) LEDs are described.
Enable QSEECOM, and thereby UEFI variable access, on the Medion SPRCHRGD
14 S1 (commit should have been on drivers branch).
* tag 'qcom-arm64-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (155 commits)
dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali and Glymur Platforms
dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali
arm64: dts: qcom: lemans: enable static TPDM
arm64: dts: qcom: kodiak: Add memory region for audiopd
arm64: dts: qcom: x1e78100-lenovo-thinkpad-t14s: add HDMI nodes
arm64: dts: qcom: x1e: bus is 40-bits (fix 64GB models)
arm64: dts: qcom: lemans; Add EL2 overlay
arm64: dts: qcom: sm8150: add uart13
arm64: dts: qcom: sdm845-db845c: specify power for WiFi CH1
arm64: dts: qcom: sdm845-db845c: drop CS from SPIO0
arm64: dts: qcom: qrb4210-rb2: Fix UART3 wakeup IRQ storm
arm64: dts: qcom: sm6125-ginkgo: Fix missing msm-id subtype
arm64: dts: qcom: qcs8300: Add GPU cooling
arm64: dts: qcom: sa8775p: Add reg and clocks for QoS configuration
arm64: dts: qcom: hamoa-iot-evk: Enable TPM (ST33) on SPI11
arm64: dts: qcom: talos: Add PMU support
arm64: dts: qcom: talos: switch to interrupt-cells 4 to add PPI partitions
arm64: dts: qcom: ipq9574: Complete USB DWC3 wrapper interrupts
arm64: dts: qcom: ipq5018: Correct USB DWC3 wrapper interrupts
arm64: dts: qcom: monaco: Add CTCU and ETR nodes
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add dt schema documentation and clock IDs for the Display Process Unit
(DPU) clock management unit (CMU). This CMU feeds IPs such as image scaler,
enhancer and compressor.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Link: https://patch.msgid.link/20260113-dpu-clocks-v3-2-cb85424f2c72@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add compatible strings for clock drivers to support Spacemit K3 SoC,
also includes all the defined clock IDs.
The SpacemiT K3 SoC clock IP is scattered over several different blocks,
which are APBC, APBS, APMU, DCIU, MPMU, all of them are capable of
generating clock and reset signals. APMU and MPMU have additional Power
Domain management functionality.
Following is a brief list that shows devices managed in each block:
APBC: UART, GPIO, PWM, SPI, TIMER, I2S, IR, DR, TSEN, IPC, CAN
APBS: various PPL clocks control
APMU: CCI, CPU, CSI, ISP, LCD, USB, QSPI, DMA, VPU, GPU, DSI, PCIe, EMAC..
DCID: SRAM, DMA, TCM
MPMU: various PLL1 derived clocks, UART, WATCHDOG, I2S
Link: https://lore.kernel.org/r/20260108-k3-clk-v5-1-42a11b74ad58@gentoo.org
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Add PCLKCAN ID for CANFD to both R9A09G077 and R9A09G087 SoCs.
This definition is required for describing CANFD device in DT.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251224165049.3384870-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Merge the Kaanapali camera, display, GPU, and video clock controller
bindings through a topic branch, to allow making them available to the
DeviceTree branch as well.
Qualcomm GX(graphics) is a clock controller which has PLLs, clocks and
Power domains (GDSC), but the requirement from the SW driver is to use
the GDSC power domain from the clock controller to recover the GPU
firmware in case of any failure/hangs. The rest of the resources of the
clock controller are being used by the firmware of GPU. This module
exposes the GDSC power domains which helps the recovery of Graphics
subsystem.
Add bindings documentation for the Kaanapali Graphics Clock and Graphics
power domain Controller for Kaanapali SoC.
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-7-8e10adc236a8@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add device tree bindings for the video clock controller on Qualcomm
Kaanapali SoC.
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-6-8e10adc236a8@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Update the compatible and the bindings for CAMCC support on Kaanapali
SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260107-kaanapali-mmcc-v3-v3-5-8e10adc236a8@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Merge the SM8750 camera clock controller binding through a topic branch,
in order to allow the defines to made availabe to the DeviceTree
branch as well.
Add device tree bindings for the camera clock controller on
Qualcomm SM8750 platform. The camera clock controller is split between
camcc and cambist. The cambist controls the mclks of the camera clock
controller.
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251202-sm8750_camcc-v1-2-b3f7ef6723f1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add some of the UFS symbol rx/tx muxes were not initially described.
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260103-ufs_symbol_clk-v2-1-51828cc76236@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add binding ID for C910 bus clock, which takes CLK_C910 as parent and is
essential for C910 cluster's operation.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Yao Zi <ziyao@disroot.org>
Signed-off-by: Drew Fustini <fustini@kernel.org>
Add indices for video encoder, demodulator and CVBS clocks.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
Link: https://lore.kernel.org/r/20250919-add_video_clk-v6-1-fe223161fb3f@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Add DT bindings for the peripheral clock controller of the Amlogic T7
SoC family.
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20251212022619.3072132-4-jian.hu@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Add DT bindings for the SCMI clock controller of the Amlogic T7 SoC family.
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20251212022619.3072132-3-jian.hu@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Add clock definitions for XSPI0/1 to both R9A09G077 and R9A09G087 SoCs.
These definitions are required for describing XSPI devices in DT
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251028165127.991351-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add clock and reset identifiers for the Video Input Interface.
These identifiers support two instances: VIIF0 and VIIF1.
Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Remove the definitions of number of clocks from bindings because they
prevent adding new clocks. Since the previous patch removed all refereces
within the driver, they can now be deleted.
The same for resets and plls.
Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add clock and reset ID defines for rv1126b.
Also add documentation for the rv1126b CRU core.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20251111025738.869847-3-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The router link clock branches also feature some reset logic, which is
required to properly power sequence the hardware for DP tunneling over
USB4.
Describe these missing resets.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251118-topic-usb4_x1e_dispcc-v1-1-14c68d842c71@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add compatible string for SM8750 video clock controller and the bindings
for SM8750 Qualcomm SoC.
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20251118-sm8750-videocc-v2-v4-4-049882a70c9f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add definition for display subsystem reset control, so display
driver can reset display controller properly, clearing any
configuration left there by bootloader. Since 6.17 after
PM domains rework it became necessary for display to function.
Fixes: 0e789b491b ("pmdomain: core: Leave powered-on genpds on until sync_state")
Cc: stable@vger.kernel.org # 6.17
Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20251116-sdm660-mdss-reset-v2-1-6219bec0a97f@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add documentation for i.MX8ULP's SIM LPAV module.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Link: https://lore.kernel.org/r/20251104120301.913-3-laurentiumihalcea111@gmail.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Linus Torvalds
Stephen Boyd
Jammy Huang
Rob Herring (Arm)
Arnd Bergmann
Krzysztof Kozlowski
Peter Griffin
Geert Uytterhoeven
Yixun Lan
Lad Prabhakar
Bjorn Andersson
Taniya Das
Barnabás Czémán
Raghav Sharma
Yao Zi
Chuan Liu
Jian Hu
Finley Xiao
Yuji Ishikawa
Elaine Zhang
Konrad Dybcio
Alexey Minnekhanov
Laurentiu Mihalcea