59 lines
1.8 KiB
C
59 lines
1.8 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_KAANAPALI_H
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#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_KAANAPALI_H
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/* VIDEO_CC clocks */
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#define VIDEO_CC_AHB_CLK 0
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#define VIDEO_CC_AHB_CLK_SRC 1
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#define VIDEO_CC_MVS0_CLK 2
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#define VIDEO_CC_MVS0_CLK_SRC 3
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#define VIDEO_CC_MVS0_FREERUN_CLK 4
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#define VIDEO_CC_MVS0_SHIFT_CLK 5
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#define VIDEO_CC_MVS0_VPP0_CLK 6
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#define VIDEO_CC_MVS0_VPP0_FREERUN_CLK 7
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#define VIDEO_CC_MVS0_VPP1_CLK 8
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#define VIDEO_CC_MVS0_VPP1_FREERUN_CLK 9
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#define VIDEO_CC_MVS0A_CLK 10
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#define VIDEO_CC_MVS0A_CLK_SRC 11
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#define VIDEO_CC_MVS0A_FREERUN_CLK 12
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#define VIDEO_CC_MVS0B_CLK 13
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#define VIDEO_CC_MVS0B_CLK_SRC 14
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#define VIDEO_CC_MVS0B_FREERUN_CLK 15
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#define VIDEO_CC_MVS0C_CLK 16
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#define VIDEO_CC_MVS0C_CLK_SRC 17
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#define VIDEO_CC_MVS0C_FREERUN_CLK 18
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#define VIDEO_CC_MVS0C_SHIFT_CLK 19
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#define VIDEO_CC_PLL0 20
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#define VIDEO_CC_PLL1 21
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#define VIDEO_CC_PLL2 22
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#define VIDEO_CC_PLL3 23
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#define VIDEO_CC_SLEEP_CLK 24
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#define VIDEO_CC_TS_XO_CLK 25
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#define VIDEO_CC_XO_CLK 26
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#define VIDEO_CC_XO_CLK_SRC 27
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/* VIDEO_CC power domains */
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#define VIDEO_CC_MVS0A_GDSC 0
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#define VIDEO_CC_MVS0_GDSC 1
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#define VIDEO_CC_MVS0_VPP1_GDSC 2
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#define VIDEO_CC_MVS0_VPP0_GDSC 3
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#define VIDEO_CC_MVS0C_GDSC 4
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/* VIDEO_CC resets */
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#define VIDEO_CC_INTERFACE_BCR 0
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#define VIDEO_CC_MVS0_BCR 1
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#define VIDEO_CC_MVS0_VPP0_BCR 2
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#define VIDEO_CC_MVS0_VPP1_BCR 3
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#define VIDEO_CC_MVS0A_BCR 4
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#define VIDEO_CC_MVS0C_CLK_ARES 5
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#define VIDEO_CC_MVS0C_BCR 6
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#define VIDEO_CC_MVS0_FREERUN_CLK_ARES 7
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#define VIDEO_CC_MVS0C_FREERUN_CLK_ARES 8
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#define VIDEO_CC_XO_CLK_ARES 9
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#endif
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