75 lines
1.6 KiB
YAML
75 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mfd/nxp,lpc3220-scb.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP LPC32xx System Control Block
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maintainers:
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- Vladimir Zapolskiy <vz@mleia.com>
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description:
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NXP LPC32xx SoC series have a System Control Block, which serves for
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a multitude of purposes including clock management, DMA muxes, storing
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SoC unique ID etc.
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properties:
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compatible:
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items:
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- enum:
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- nxp,lpc3220-scb
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- const: syscon
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- const: simple-mfd
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reg:
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maxItems: 1
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ranges: true
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"#address-cells":
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const: 1
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"#size-cells":
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const: 1
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patternProperties:
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"^clock-controller@[0-9a-f]+$":
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$ref: /schemas/clock/nxp,lpc3220-clk.yaml#
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"^dma-router@[0-9a-f]+$":
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$ref: /schemas/dma/nxp,lpc3220-dmamux.yaml#
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required:
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- compatible
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- reg
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- "#address-cells"
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- "#size-cells"
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additionalProperties: false
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examples:
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- |
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syscon@400040000 {
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compatible = "nxp,lpc3220-scb", "syscon", "simple-mfd";
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reg = <0x40004000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x40004000 0x1000>;
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clock-controller@0 {
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compatible = "nxp,lpc3220-clk";
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reg = <0x0 0x114>;
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clocks = <&xtal_32k>, <&xtal>;
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clock-names = "xtal_32k", "xtal";
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#clock-cells = <1>;
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};
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dma-router@78 {
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compatible = "nxp,lpc3220-dmamux";
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reg = <0x78 0x8>;
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dma-masters = <&dma>;
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#dma-cells = <3>;
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};
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};
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