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add config and dts for luckfox-pico-plus sd boot

This commit is contained in:
livefd03 2023-09-17 14:14:48 +08:00
parent 4b302ccef8
commit a96e8e88d2
2 changed files with 271 additions and 0 deletions
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84
project/cfg/BoardConfig_IPC/BoardConfig-EMMC-NONE-RV1103_Luckfox_Pico_Plus-IPC.mk Normal file
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#!/bin/bash
# Target arch
export RK_ARCH=arm
# Target CHIP
export RK_CHIP=rv1106
# Target Toolchain Cross Compile
export RK_TOOLCHAIN_CROSS=arm-rockchip830-linux-uclibcgnueabihf
# Target boot medium: emmc/spi_nor/spi_nand
export RK_BOOT_MEDIUM=emmc
# Uboot defconfig
export RK_UBOOT_DEFCONFIG=rv1106_defconfig
# Uboot defconfig fragment
export RK_UBOOT_DEFCONFIG_FRAGMENT=rk-emmc.config
# Kernel defconfig
export RK_KERNEL_DEFCONFIG=luckfox_rv1106_linux_defconfig
# Kernel dts
export RK_KERNEL_DTS=rv1103g-luckfox-pico-plus-sdboot.dts
#misc image
export RK_MISC=wipe_all-misc.img
# Config sensor IQ files
# RK_CAMERA_SENSOR_IQFILES format:
# "iqfile1 iqfile2 iqfile3 ..."
# ./build.sh media and copy <SDK root dir>/output/out/media_out/isp_iqfiles/$RK_CAMERA_SENSOR_IQFILES
export RK_CAMERA_SENSOR_IQFILES="sc4336_OT01_40IRC_F16.json sc3336_CMK-OT2119-PC1_30IRC-F16.json"
#export RK_CAMERA_SENSOR_IQFILES="sc4336_OT01_40IRC_F16.json sc3336_CMK-OT2119-PC1_30IRC-F16.json sc530ai_CMK-OT2115-PC1_30IRC-F16.json"
# Config sensor lens CAC calibrattion bin files
export RK_CAMERA_SENSOR_CAC_BIN="CAC_sc4336_OT01_40IRC_F16"
#export RK_CAMERA_SENSOR_CAC_BIN="CAC_sc4336_OT01_40IRC_F16 CAC_sc530ai_CMK-OT2115-PC1_30IRC-F16"
# Config CMA size in environment
export RK_BOOTARGS_CMA_SIZE="24M"
#export RK_BOOTARGS_CMA_SIZE="66M"
# config partition in environment
# RK_PARTITION_CMD_IN_ENV format:
# <partdef>[,<partdef>]
# <partdef> := <size>[@<offset>](part-name)
# Note:
# If the first partition offset is not 0x0, it must be added. Otherwise, it needn't adding.
export RK_PARTITION_CMD_IN_ENV="32K(env),512K@32K(idblock),256K(uboot),32M(boot),2G(rootfs),1G(oem),2G(userdata),-(media)"
#export RK_PARTITION_CMD_IN_ENV="256K(env),256K@256K(idblock),256K(uboot),8M(boot),32M(rootfs),48M(oem),32M(userdata),-(media)"
# config partition's filesystem type (squashfs is readonly)
# emmc: squashfs/ext4
# nand: squashfs/ubifs
# spi nor: squashfs/jffs2
# RK_PARTITION_FS_TYPE_CFG format:
# AAAA:/BBBB/CCCC@ext4
# AAAA ----------> partition name
# /BBBB/CCCC ----> partition mount point
# ext4 ----------> partition filesystem type
#export RK_PARTITION_FS_TYPE_CFG=rootfs@IGNORE@squashfs,oem@/oem@squashfs,userdata@/userdata@ubifs
export RK_PARTITION_FS_TYPE_CFG=rootfs@IGNORE@ext4,userdata@/userdata@ext4,oem@/oem@ext4
# config filesystem compress (Just for squashfs or ubifs)
# squashfs: lz4/lzo/lzma/xz/gzip, default xz
# ubifs: lzo/zlib, default lzo
# export RK_SQUASHFS_COMP=xz
# export RK_UBIFS_COMP=lzo
# app config
export RK_APP_TYPE=RKIPC_RV1103
# export RK_APP_TYPE=RKIPC_RV1106
# build ipc web backend
# export RK_APP_IPCWEB_BACKEND=y
# enable install app to oem partition
export RK_BUILD_APP_TO_OEM_PARTITION=y
# enable rockchip test
export RK_ENABLE_ROCKCHIP_TEST=y

187
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-plus-sdboot.dts Normal file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1103.dtsi"
#include "rv1106-evb.dtsi"
#include "rv1103-luckfox-pico-plus-ipc.dtsi"
/ {
model = "Luckfox Pico Plus";
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
};
/**********GPIO**********/
&pinctrl {
};
/**********SDMMC**********/
&sdmmc {
max-frequency = <50000000>;
no-sdio;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
status = "okay";
};
&sfc {
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <75000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
/**********ETH**********/
&gmac {
status = "okay";
};
/**********USB**********/
//&usbdrd {
// status = "disabled";
//};
//&usbdrd_dwc3 {
// status = "disabled";
//};
//&u2phy {
// status = "disabled";
//};
//&u2phy_otg {
// status = "disabled";
//};
/**********I2C**********/
// &i2c0 {
// status = "okay";
// pinctrl-0 = <&i2c0m2_xfer>;
// clock-frequency = <100000>;
// };
&i2c3 {
status = "okay";
pinctrl-0 = <&i2c3m1_xfer>;
clock-frequency = <100000>;
};
/**********SPI**********/
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0m0_pins>;
cs-gpios = <&gpio1 RK_PC0 1>;
// cs-gpios = <&gpio1 26 1>;
#address-cells = <1>;
#size-cells = <0>;
spidev@0 {
compatible = "rockchip,spidev";
spi-max-frequency = <1000000000>;
reg = <0>;
};
};
/**********UART**********/
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
//&uart5 {
// status = "okay";
// pinctrl-names = "default";
// pinctrl-0 = <&uart5m0_xfer>;
//};
/**********PWM**********/
&pwm0 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm0m0_pins>;
// pinctrl-0 = <&pwm0m1_pins>;
};
&pwm1 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm1m0_pins>;
// pinctrl-0 = <&pwm1m1_pins>;
};
//&pwm2 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm2m2_pins>;
//};
//&pwm3 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm3m2_pins>;
//};
//&pwm4 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm4m2_pins>;
//};
//&pwm5 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm5m2_pins>;
//};
//&pwm6 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm6m2_pins>;
//};
//&pwm7 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm7m2_pins>;
//};
//&pwm8 {
// status = "okay";
// pinctrl-names = "active";
// // pinctrl-0 = <&pwm8m1_pins>;
// pinctrl-0 = <&pwm8m0_pins>;
//};
//&pwm9 {
// status = "okay";
// pinctrl-names = "active";
// // pinctrl-0 = <&pwm9m1_pins>;
// pinctrl-0 = <&pwm9m0_pins>;
//};
&pwm10 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm10m1_pins>;
// pinctrl-0 = <&pwm10m2_pins>;
// pinctrl-0 = <&pwm10m0_pins>;
};
&pwm11 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm11m1_pins>;
// pinctrl-0 = <&pwm11m2_pins>;
// pinctrl-0 = <&pwm11m0_pins>;
};